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  1. 22 7月, 2021 2 次提交
    • M
      drm/i915/icl: Drop a couple unnecessary workarounds · 131b1252
      由 Matt Roper 提交于 
      While doing a quick sanity check of the ICL workarounds in the driver I
noticed a few things that should be updated:

 * There's no mention in the bspec that WaPipelineFlushCoherentLines
   is needed on gen11 (both the current WA database and the old,
   deprecated page 20196 were checked); it appears this might have just
   been copied from the gen9 list?  Even if this were needed, it doesn't
   seem like this was the correct implementation anyway since the gen9
   workaround is supposed to be implemented in the indirect context bb
   (as we do in gen8_emit_flush_coherentl3_wa() on gen8/gen9).

 * WaForwardProgressSoftReset does not appear in the current workaround
   database.  The old deprecated workaround list has a note indicating
   the workaround was dropped in 2017, so we should be safe to drop it
   from the code too.

While we're at it, add the formal workaround ID number to
WaDisableBankHangMode (our hardware team made a transition from
text-based workaround names to ID numbers partway through the
development of ICL, which is why some workarounds only have names, some
only have numbers, and some have both).

Bspec: 33450
Signed-off-by: NMatt Roper <matthew.d.roper@intel.com>
Reviewed-by: NJosé Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210717051426.4120328-3-matthew.d.roper@intel.com
      131b1252
    • M
      drm/i915: Fix application of WaInPlaceDecompressionHang · f4fa096a
      由 Matt Roper 提交于 
      On SKL we've been applying this workaround on H0+ steppings, which is
actually backwards; H0 is supposed to be the first stepping where the
workaround is no longer needed.  Flip the bounds so that the workaround
applies to all steppings _before_ H0.

On BXT we've been applying this workaround to all steppings, but the
bspec tells us it's only needed until C0.  Pre-C0 GT steppings only
appeared in pre-production hardware, which we no longer support in the
driver, so we can drop the workaround completely for this platform.

On ICL we've been applying this workaround to all steppings, but there
doesn't seem to be any indication that this workaround was ever needed
for this platform (even now-deprecated page 20196 of the bspec doesn't
mention it).  We can go ahead and drop it.

I also don't see any mention of this workaround being needed for KBL,
although this may be an oversight since the workaround is needed for all
steppings of CFL.  I'll leave the workaround in place for KBL to be
safe.

Bspec: 14091, 33450
Signed-off-by: NMatt Roper <matthew.d.roper@intel.com>
Reviewed-by: NJosé Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210717051426.4120328-2-matthew.d.roper@intel.com
      f4fa096a
  3. 15 7月, 2021 6 次提交
  5. 14 7月, 2021 3 次提交
  7. 18 6月, 2021 2 次提交
    • M
      drm/i915: Add support for explicit L3BANK steering · 31939274
      由 Matt Roper 提交于 
      Because Render Power Gating restricts us to just a single subslice as a
valid steering target for reads of multicast registers in a SUBSLICE
range, the default steering we setup at init may not lead to a suitable
target for L3BANK multicast register.  In cases where it does not, use
explicit runtime steering whenever an L3BANK multicast register is read.

While we're at it, let's simplify the function a little bit and drop its
support for gen10/CNL since no such platforms ever materialized for real
use.  Multicast register steering is already an area that causes enough
confusion; no need to complicate it with what's effectively dead code.

v2:
 - Use gt->uncore instead of gt->i915->uncore.  (Tvrtko)
 - Use {} as table terminator.  (Rodrigo)

v3:
 - L3bank fuse register is a disable mask rather than an enable mask.
   We need to invert it before use.  (CI)

v4:
 - L3bank ID goes in the subslice field, not the slice field.  (CI)

Cc: Tvrtko Ursulin <tvrtko.ursulin@linux.intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: NMatt Roper <matthew.d.roper@intel.com>
Reviewed-by: NRodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210617211425.1943662-4-matthew.d.roper@intel.com
      31939274
    • M
      drm/i915: Add GT support for multiple types of multicast steering · 0957e931
      由 Matt Roper 提交于 
      Although most of our multicast registers are replicated per-subslice, we
also have a small number of multicast registers that are replicated
per-l3 bank instead.  For both types of multicast registers we need to
make sure we steer reads of these registers to a valid instance.
Ideally we'd like to find a specific instance ID that would steer reads
of either type of multicast register to a valid instance (i.e., not
fused off and not powered down), but sometimes the combination of
part-specific fusing and the additional restrictions imposed by Render
Power Gating make it impossible to find any overlap between the set of
valid subslices and valid l3 banks.  This problem will become even more
noticeable on our upcoming platforms since they will be adding
additional types of multicast registers with new types of replication
and rules for finding valid instances for reads.

To handle this we'll continue to pick a suitable subslice instance at
driver startup and program this as the default (sliceid,subsliceid)
setting in the steering control register (0xFDC).  In cases where we
need to read another type of multicast GT register, but the default
subslice steering would not correspond to a valid instance, we'll
explicitly re-steer the single read to a valid value, perform the read,
and then reset the steering to it's "subslice" default.

This patch adds the general functionality to prepare for this explicit
steering of other multicast register types.  We'll plug L3 bank steering
into this in the next patch, and then add additional types of multicast
registers when the support for our next upcoming platform arrives.

v2:
 - Use entry->end==0 as table terminator.  (Rodrigo)
 - Grab forcewake in wa_list_verify() now that we're using accessors
   that assume forcewake is already held.

v3:
 - Fix loop condition when iterating over steering range tables.
   (Rodrigo)

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: NMatt Roper <matthew.d.roper@intel.com>
Reviewed-by: NRodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210617211425.1943662-3-matthew.d.roper@intel.com
      0957e931
  9. 16 6月, 2021 1 次提交
  11. 06 6月, 2021 1 次提交
  13. 07 5月, 2021 1 次提交
  15. 09 4月, 2021 4 次提交
  17. 29 3月, 2021 3 次提交
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  21. 09 2月, 2021 1 次提交
  23. 01 2月, 2021 1 次提交
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  27. 14 1月, 2021 3 次提交
  29. 10 1月, 2021 1 次提交
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  33. 02 1月, 2021 1 次提交
  35. 21 12月, 2020 1 次提交