- 07 5月, 2014 25 次提交
-
-
由 Dave Gerlach 提交于
The VTT regulator for DDR3 termination on the am335x-evmsk is controlled by a gpio. It is configured by the bootloader so here we define an always-on, fixed voltage regulator to hold the gpio. Signed-off-by: NDave Gerlach <d-gerlach@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Dave Gerlach 提交于
The VTT regulator for DDR3 termination on the am437x-gp-evm is controlled by a gpio. It is configured by the bootloader so here we define an always-on, fixed voltage regulator to hold the gpio. Signed-off-by: NDave Gerlach <d-gerlach@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Sekhar Nori 提交于
Add touchscreen support for AM437x GP EVM using pixcir touchscreen controller. CC: Benoit Cousson <bcousson@baylibre.com> CC: Tony Lindgren <tony@atomide.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com> Acked-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Roger Quadros 提交于
Fixup Y resolution and add default pin state. Also update the compatible id. CC: Benoit Cousson <bcousson@baylibre.com> CC: Tony Lindgren <tony@atomide.com> CC: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Guido Martínez 提交于
Use phandles instead of unit adresses to reference usb and dma nodes. This makes the DT more robust and readable. Signed-off-by: NGuido Martínez <guido@vanguardiasur.com.ar> Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com> Acked-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Guido Martínez 提交于
Use phandles instead of unit adresses to reference usb and dma nodes. This makes the DT more robust and readable. Signed-off-by: NGuido Martínez <guido@vanguardiasur.com.ar> Acked-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Guido Martínez 提交于
Use phandles instead of unit adresses to reference usb and dma nodes. This makes the DT more robust and readable. Signed-off-by: NGuido Martínez <guido@vanguardiasur.com.ar> Acked-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Guido Martínez 提交于
Use phandles instead of unit adresses to reference usb and dma nodes. This makes the DT more robust and readable. Signed-off-by: NGuido Martínez <guido@vanguardiasur.com.ar> Acked-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Rajendra Nayak 提交于
The only difference from the dra74x devices is the missing .smp entry. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Rajendra Nayak 提交于
Use of const init definition must use __initconst so replace all such instances where __initdata is used. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Rajendra Nayak 提交于
DRA722 is part of DRA72x family which are single core cortex A15 devices with most infrastructure IPs otherwise same as whats on the DRA74x family. So move the cpu nodes into dra74x.dtsi and dra72x.dtsi respectively. Also add a minimal dra72-evm dts file. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Cc: linux-doc@vger.kernel.org Cc: devicetree@vger.kernel.org Acked-by: NArnd Bergmann <arnd@arndb.de> [tony@atomide.com: updated for Makefile sorting] Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Rajendra Nayak 提交于
"ti,dra752" is neither documented nor correct, since the device is actually a dra742 device as rightly documented in dt bindings. Signed-off-by: NRajendra Nayak <rnayak@ti.com> Cc: devicetree@vger.kernel.org Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Sourav Poddar 提交于
This patch adds qspi nodes for am43xx SOC devices. Signed-off-by: NSourav Poddar <sourav.poddar@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Dmitry Lifshitz 提交于
Add support of AW-NH387 (mwifiex) WiFi/BT chip connected to MMC3. Signed-off-by: NDmitry Lifshitz <lifshitz@compulab.co.il> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Dmitry Lifshitz 提交于
Add support for CM-T54 CoM and SBC-T54 board: http://compulab.co.il/products/computer-on-modules/cm-t54/ http://compulab.co.il/products/sbcs/sbc-t54/ SBC-T54 is a single board computer based on OMAP5432 CPU. It is implemented with a CM-T54 CoM providing most of the functions, and SB-T54 carrier board providing connectors and several additional functions. Added basic support for: * PMIC * LED * MMC/SD * eMMC * USB * I2C1/4 * SB-T54 and CM-T54 EEPROMs * RTC Signed-off-by: NDmitry Lifshitz <lifshitz@compulab.co.il> [tony@atomide.com: updated for Makefile sorting] Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Nathan Lynch 提交于
Expose the PMU on OMAP5. Tested with perf on OMAP5 uEVM. Signed-off-by: NNathan Lynch <nathan_lynch@mentor.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Sakari Ailus 提交于
The N950/N9 uses two additional regulators from the twl 4030 for CSI-2 receiver (vaux2) and cameras (vaux3). Signed-off-by: NSakari Ailus <sakari.ailus@iki.fi> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Sebastian Reichel 提交于
This patch adds support for the Nokia N900's sound system. Signed-off-by: NSebastian Reichel <sre@kernel.org> Reviewed-by: NMark Brown <broonie@linaro.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Sebastian Reichel 提交于
Add madc node to twl4030, so that board DTS files can simply reference the A/D converter. Signed-off-by: NSebastian Reichel <sre@debian.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Sebastian Reichel 提交于
Add device tree support for the wireless chip built into the Nokia N900. Signed-off-by: NSebastian Reichel <sre@debian.org> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 George Cherian 提交于
Enable - USB PHY - USB for am43x-epos-evm Signed-off-by: NGeorge Cherian <george.cherian@ti.com> Acked-by: NRoger Quadros <rogerq@ti.com> Acked-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 George Cherian 提交于
Enable - USB PHY - USB for am437x-gp-evm Signed-off-by: NGeorge Cherian <george.cherian@ti.com> Acked-by: NRoger Quadros <rogerq@ti.com> Acked-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 George Cherian 提交于
Add nodes for 2 instances each of - ocp2scp - USB PHY control module - USB PHY - dwc3_omap - USB for AM43xx. Signed-off-by: NGeorge Cherian <george.cherian@ti.com> Acked-by: NRoger Quadros <rogerq@ti.com> Acked-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 George Cherian 提交于
Add USB and USB PHY reference clock data Signed-off-by: NGeorge Cherian <george.cherian@ti.com> Acked-by: NRoger Quadros <rogerq@ti.com> Acked-by: NFelipe Balbi <balbi@ti.com> [tony@atomide.com: tabified] Signed-off-by: NTony Lindgren <tony@atomide.com>
-
由 Peter Robinson 提交于
With ARCH_OMAP2PLUS being separated out into OMAP2/3/4/5 etc all the TI device tree blobs are built no matter the combination of SoCs that are enabled. This often causes a bunch of irrelevant .dts to be built on a multi platform kernel, this enables the building of just the ones relevant to the SoCs that are actually enabled. It also orders the dts file alphabetically. This also helps to avoid trivial merge conflicts when adding support for new boards. [tony@atomide.com: updated the order for am335x and am43x, moved am3517 to omap3] Signed-off-by: NTony Lindgren <tony@atomide.com>
-
- 28 4月, 2014 1 次提交
-
-
由 Mark Salter 提交于
The kvm/mmu code shared by arm and arm64 uses kalloc() to allocate a bounce page (if hypervisor init code crosses page boundary) and hypervisor PGDs. The problem is that kalloc() does not guarantee the proper alignment. In the case of the bounce page, the page sized buffer allocated may also cross a page boundary negating the purpose and leading to a hang during kvm initialization. Likewise the PGDs allocated may not meet the minimum alignment requirements of the underlying MMU. This patch uses __get_free_page() to guarantee the worst case alignment needs of the bounce page and PGDs on both arm and arm64. Cc: <stable@vger.kernel.org> # 3.10+ Signed-off-by: NMark Salter <msalter@redhat.com> Acked-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
-
- 26 4月, 2014 2 次提交
-
-
由 Will Deacon 提交于
KVM currently crashes and burns on big-endian hosts, so don't allow it to be selected until we've got that fixed. Cc: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
-
由 Linus Torvalds 提交于
The mmu-gather operation 'tlb_flush_mmu()' has done two things: the actual tlb flush operation, and the batched freeing of the pages that the TLB entries pointed at. This splits the operation into separate phases, so that the forced batched flushing done by zap_pte_range() can now do the actual TLB flush while still holding the page table lock, but delay the batched freeing of all the pages to after the lock has been dropped. This in turn allows us to avoid a race condition between set_page_dirty() (as called by zap_pte_range() when it finds a dirty shared memory pte) and page_mkclean(): because we now flush all the dirty page data from the TLB's while holding the pte lock, page_mkclean() will be held up walking the (recently cleaned) page tables until after the TLB entries have been flushed from all CPU's. Reported-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Tested-by: NDave Hansen <dave.hansen@intel.com> Acked-by: NHugh Dickins <hughd@google.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Russell King - ARM Linux <linux@arm.linux.org.uk> Cc: Tony Luck <tony.luck@intel.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
-
- 25 4月, 2014 6 次提交
-
-
由 Sebastian Hesselbarth 提交于
Some Marvell PJ4B CPUs also implement iWMMXt extensions. With a proper check for iWMMXt coprocessors now in place, enable it by default on PJ4B. While at it, also allow to manually select the corresponding Kconfig option. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
由 Sebastian Hesselbarth 提交于
Commit fdb487f5 ("ARM: 8015/1: Add cpu_is_pj4 to distinguish PJ4 because it has some differences with V7") introduced a cpuid check for Marvell PJ4 processors to fix a regression caused by adding PJ4 based Marvell Dove into multi_v7. Unfortunately, this check is too narrow to catch PJ4 used on Dove itself and breaks iWMMXt support. This patch therefore relaxes the cpuid mask to match both PJ4 and PJ4B. Also, rework the given comment about PJ4/PJ4B modifications to be a little bit more specific about the differences. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
由 Sebastian Hesselbarth 提交于
commit fdb487f5 ("ARM: 8015/1: Add cpu_is_pj4 to distinguish PJ4 because it has some differences with V7") introduced a fix for checking PJ4 cpuid to not use PJ4 specific coprocessor access on non-PJ4 platforms. Unfortunately, this in turn broke Marvell Armada 370/XP, both comprising Marvell PJ4B CPUs without iWMMXt extension. Instead of only checking for cpuid, which may not be sufficient to determine iWMMXt support, the presence of iWMMXt coprocessors can be checked by enabling and reading the Coprocessor ID register (wCID, register 0 of CP1). Therefore this adds an explicit check for the presence and correct wCID value, before enabling iWMMXt capabilities. As a bonus, also print the iWMMXt version of a detected coprocessor. This has been tested to properly detect iWMMXt presence/absence on: - PJ4, CPUID 0x560f5815, wCID 0x56052001: Marvell Dove, iWMMXt v2 - PJ4B, CPUID 0x561f5811: Marvell Armada 370, no iWMMXt - PJ4B, CPUID 0x562f5841, wCID 0x56052001: Marvell Armada 1500, iWMMXt v2 - PJ4B, CPUID 0x562f5842: Marvell Armada XP, no iWMMXt Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
由 Sebastian Hesselbarth 提交于
This fixes PJ4 coprocessor init to only expose iWMMXt capabilities, if the corresponding kernel support for iWMMXt is enabled. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
由 Sebastian Hesselbarth 提交于
iwmmxt.S requires special treatment of coprocessor access registers for PJ4 and XScale-based CPUs. It only checks for CPU_PJ4 and drops down to XScale-based treatment on all other architectures. As some PJ4B also come with iWMMXt and also need PJ4 treatment, rework the corresponding preprocessor directives to explicitly check for supported architectures and fail on unsupported ones. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
-
由 Punit Agrawal 提交于
The SPC stores voltage in mV while the code assumes it was returning uV. Convert the returned voltage to uV before storing. Also fix the comment depicting voltage to uV. Signed-off-by: NPunit Agrawal <punit.agrawal@arm.com> Reviewed-by: NSudeep Holla <sudeep.holla@arm.com> Signed-off-by: NPawel Moll <pawel.moll@arm.com>
-
- 24 4月, 2014 6 次提交
-
-
由 Stephen Warren 提交于
Tegra124 only has 4 UARTs. Parts of the documentation hint at a fifth UART, but this appears to be left-over from earlier SoC documentation. Remove the non-existent DT node for UART5. Cc: <stable@vger.kernel.org> Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
-
由 Paul Bolle 提交于
Commit a7cbe92c ("ARM: tegra: remove tegra EMC scaling driver") removed the only user of TEGRA_EMC_SCALING_ENABLE. Remove its Kconfig entry too. Signed-off-by: NPaul Bolle <pebolle@tiscali.nl> Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
-
由 Domenico Andreoli 提交于
Few things were out of order: - removed ARCH_BCM2835 duplicate - shuffled ARCH_BCM_5301X, ARCH_U8500 and ARCH_U300 around so to keep the list sorted Cc: Arnd Bergmann <arnd@arndb.de> Cc: Olof Johansson <olof@lixom.net> Signed-by: NDomenico Andreoli <domenico.andreoli@linux.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
-
由 Rob Herring 提交于
In commit ddb902cc (ARM: centralize common multi-platform kconfig options), CLKSRC_OF was removed from some platforms, but not added to ARCH_MULTIPLATFORM. Fix this. Reported-by: NLauri Hintsala <lauri.hintsala@bluegiga.com> Signed-off-by: NRob Herring <robh@kernel.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
-
由 Alex Elder 提交于
I get a build warning because spear_clocksource_init() calls clocksource_mmio_init(), but it doesn't have an __init annotation. Fix that. Signed-off-by: NAlex Elder <elder@linaro.org> Acked-by: NViresh Kumar <viresh.kumar@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
-
由 Andrea Adami 提交于
hx4700 needs the same fix as in 9705e746 "ARM: pxa: fix various compilation problems" Fix build errors. Initial one is: /linux/arch/arm/mach-pxa/include/mach/hx4700.h:18:32: error: 'PXA_NR_BUILTIN_GPIO' undeclared here (not in a function) | #define HX4700_ASIC3_GPIO_BASE PXA_NR_BUILTIN_GPIO Cc: stable@vger.kernel.org # v3.13+ Signed-off-by: NAndrea Adami <andrea.adami@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
-