- 19 12月, 2019 3 次提交
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由 Jose Abreu 提交于
Only the last received buffer contains the FCS field. Check for end of packet before trying to strip the FCS field. Fixes: 88ebe2cf ("net: stmmac: Rework stmmac_rx()") Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
The maximum MTU value is determined by the maximum size of TX FIFO so that a full packet can fit in the FIFO. Add a check for this in the MTU change callback. Also check if provided and rounded MTU does not passes the maximum limit of 16K. Changes from v2: - Align MTU before checking if its valid Fixes: 7ac6653a ("stmmac: Move the STMicroelectronics driver") Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
Split Header feature needs to know the size of RX buffer but current code is determining it too late. Fix this by moving the RX buffer computation to earlier stage. Changes from v2: - Do not try to align already aligned buffer size Fixes: 67afd6d1 ("net: stmmac: Add Split Header support and enable it in XGMAC cores") Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 07 12月, 2019 1 次提交
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由 Jongsung Kim 提交于
Refer to the databook of DesignWare Cores Ethernet MAC Universal: 6.2.1.5 Register 4 (Transmit Descriptor List Address Register If this register is not changed when the ST bit is set to 0, then the DMA takes the descriptor address where it was stopped earlier. The stmmac_tx_err() does zero indices to Tx descriptors, but does not reset HW current Tx descriptor address. To fix inconsistency, the base address of the Tx descriptors should be rewritten before restarting Tx. Signed-off-by: NJongsung Kim <neidhard.kim@lge.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 24 11月, 2019 1 次提交
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由 Russell King 提交于
Rename the mac_link_state() method to mac_pcs_get_state() to make it clear that it should be returning the MACs PCS current state, which is used for inband negotiation rather than just reading back what the MAC has been configured for. Update the documentation to explicitly mention that this is for inband. We drop the return value as well; most of phylink doesn't check the return value and it is not clear what it should do on error - instead arrange for state->link to be false. Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk> Signed-off-by: NJakub Kicinski <jakub.kicinski@netronome.com>
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- 17 11月, 2019 1 次提交
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由 Jonathan Lemon 提交于
The page pool keeps track of the number of pages in flight, and it isn't safe to remove the pool until all pages are returned. Disallow removing the pool until all pages are back, so the pool is always available for page producers. Make the page pool responsible for its own delayed destruction instead of relying on XDP, so the page pool can be used without the xdp memory model. When all pages are returned, free the pool and notify xdp if the pool is registered with the xdp memory system. Have the callback perform a table walk since some drivers (cpsw) may share the pool among multiple xdp_rxq_info. Note that the increment of pages_state_release_cnt may result in inflight == 0, resulting in the pool being released. Fixes: d956a048 ("xdp: force mem allocator removal and periodic warning") Signed-off-by: NJonathan Lemon <jonathan.lemon@gmail.com> Acked-by: NJesper Dangaard Brouer <brouer@redhat.com> Acked-by: NIlias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 16 11月, 2019 3 次提交
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由 Jose Abreu 提交于
Coalesce logic currently increments the number of packets and sets the IC bit when the coalesced packets have passed a given limit. This does not reflect very well what coalesce was meant for as we can have a large number of packets that are coalesced and then a single one, sent later on that has the IC bit. Rework the logic so that it coalesces only upon a limit of packets and sets the IC bit for large number of packets. Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
For performance reasons, sometimes using the minimum RX Coalesce value is not optimal. Lets setup a default value that is optimal in most of the use cases. Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
We may only want to use the RX Watchdog so lets check if RX Coalesce settings are non-zero and only set the RX Interrupt on Completion bit if its not. Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 12 11月, 2019 3 次提交
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由 Jose Abreu 提交于
Implement the UDP Segmentation Offload feature in stmmac. This is only available in GMAC4+ cores. Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
This looks over-engineered. Let's use some helpers to get the buffer length and hereby simplify the stmmac_rx() function. No performance drop was seen with the new implementation. Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
The VID is converted to le16 so the variable must be __le16 type. Reported-by: Nkbuild test robot <lkp@intel.com> Fixes: c7ab0b80 ("net: stmmac: Fallback to VLAN Perfect filtering if HASH is not available") Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 07 11月, 2019 3 次提交
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由 Jose Abreu 提交于
IOC bit must be only set in the last descriptor. Move the logic up a little bit to make sure it's set in the correct descriptor. Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
When using addressing > 32 bits the TSO first descriptor only has the header so we can't set the payload field for this descriptor. Let's reset the variable so that buffer 2 value is zero. Fixes: a993db88 ("net: stmmac: Enable support for > 32 Bits addressing in XGMAC") Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
Currently, stmmac_rx() is counting the number of descriptors but it should count the number of packets as specified by the NAPI limit. Fix this. Fixes: ec222003 ("net: stmmac: Prepare to add Split Header support") Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 23 10月, 2019 1 次提交
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由 yuqi jin 提交于
When the address width of DMA is greater than 32, the packet header occupies a BD descriptor. The starting address of the data should be added to the header length. Fixes: a993db88 ("net: stmmac: Enable support for > 32 Bits addressing in XGMAC") Cc: Eric Dumazet <eric.dumazet@gmail.com> Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Jose Abreu <joabreu@synopsys.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Nyuqi jin <jinyuqi@huawei.com> Signed-off-by: NShaokun Zhang <zhangshaokun@hisilicon.com> Signed-off-by: NJakub Kicinski <jakub.kicinski@netronome.com>
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- 18 10月, 2019 1 次提交
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由 Ben Dooks (Codethink) 提交于
The stmmac_pcs_ctrl_ane() expects a register address as argument 1, but for some reason the mac_device_info is being passed. Fix the warning (and possible bug) from sparse: drivers/net/ethernet/stmicro/stmmac/stmmac_main.c:2613:17: warning: incorrect type in argument 1 (different address spaces) drivers/net/ethernet/stmicro/stmmac/stmmac_main.c:2613:17: expected void [noderef] <asn:2> *ioaddr drivers/net/ethernet/stmicro/stmmac/stmmac_main.c:2613:17: got struct mac_device_info *hw Signed-off-by: NBen Dooks <ben.dooks@codethink.co.uk> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 17 10月, 2019 1 次提交
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由 Biao Huang 提交于
disable ptp_ref_clk in suspend flow, and enable it in resume flow. Fixes: f573c0b9 ("stmmac: move stmmac_clk, pclk, clk_ptp_ref and stmmac_rst to platform structure") Signed-off-by: NBiao Huang <biao.huang@mediatek.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 07 10月, 2019 1 次提交
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由 Jose Abreu 提交于
If VLAN Hash Filtering is not available we can fallback to perfect filtering instead. Let's implement this in XGMAC and GMAC cores and let the user use this filter. VLAN VID=0 always passes filter so we check if more than 2 VLANs are created and return proper error code if so because perfect filtering only supports 1 VID at a time. Signed-off-by: NJose Abreu <joabreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 04 10月, 2019 1 次提交
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由 Thierry Reding 提交于
Enhanced addressing mode is only required when more than 32 bits need to be addressed. Add a DMA configuration parameter to enable this mode only when needed. Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 03 10月, 2019 1 次提交
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由 Thierry Reding 提交于
The stmmac driver will try to acquire its private mutex during suspend via phylink_resolve() -> stmmac_mac_link_down() -> stmmac_eee_init(). However, the phylink configuration is updated with the private mutex held already, which causes a deadlock during suspend. Fix this by moving the phylink configuration updates out of the region of code protected by the private mutex. Fixes: 19e13cb2 ("net: stmmac: Hold rtnl lock in suspend/resume callbacks") Suggested-by: NBitan Biswas <bbiswas@nvidia.com> Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 02 10月, 2019 2 次提交
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由 Jose Abreu 提交于
If WoL is enabled we can't really stop the PHY, otherwise we will not receive the WoL packet. Fix this by telling phylink that only the MAC is down and only stop the PHY if WoL is not enabled. Fixes: 74371272 ("net: stmmac: Convert to phylink and remove phylib logic") Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
The case for PTPV2_EVENT requires event packets to be captured so add this setting to the list of enabled captures. Fixes: 891434b1 ("stmmac: add IEEE PTPv1 and PTPv2 support.") Signed-off-by: NJose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 26 9月, 2019 1 次提交
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由 Thierry Reding 提交于
The size of individual pages in the page pool in given by an order. The order is the binary logarithm of the number of pages that make up one of the pages in the pool. However, the driver currently passes the number of pages rather than the order, so it ends up wasting quite a bit of memory. Fix this by taking the binary logarithm and passing that in the order field. Fixes: 2af6106a ("net: stmmac: Introducing support for Page Pool") Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 16 9月, 2019 1 次提交
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由 Jose Abreu 提交于
We need to hold rnl lock in suspend and resume callbacks because phylink requires it. Otherwise we will get a WARN() in suspend and resume. Also, move phylink start and stop callbacks to inside device's internal lock so that we prevent concurrent HW accesses. Fixes: 74371272 ("net: stmmac: Convert to phylink and remove phylib logic") Reported-by: NChristophe ROULLIER <christophe.roullier@st.com> Tested-by: NChristophe ROULLIER <christophe.roullier@st.com> Signed-off-by: NJose Abreu <joabreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 11 9月, 2019 2 次提交
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由 Alexandru Ardelean 提交于
In-between the MAC & PHY there can be a mode converter, which converts one mode to another (e.g. GMII-to-RGMII). The converter, can be passive (i.e. no driver or OS/SW information required), so the MAC & PHY need to be configured differently. For the `stmmac` driver, this is implemented via a `mac-mode` property in the device-tree, which configures the MAC into a certain mode, and for the PHY a `phy_interface` field will hold the mode of the PHY. The mode of the PHY will be passed to the PHY and from there-on it work in a different mode. If unspecified, the default `phy-mode` will be used for both. Signed-off-by: NAlexandru Ardelean <alexandru.ardelean@analog.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
When RX Coalesce settings are set to all zero (which is a valid setting) we will currently get a divide-by-zero error. Fix it. Signed-off-by: NJose Abreu <joabreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 07 9月, 2019 1 次提交
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由 Jose Abreu 提交于
We may have some SoCs that can't achieve XGMAC max speed. Limit it if asked to. Signed-off-by: NJose Abreu <joabreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 05 9月, 2019 3 次提交
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由 Jose Abreu 提交于
Maximum MTU for XGMAC cores is 16k thus the check for presence of XGMAC shall be done first in order to assign correct value. Signed-off-by: NJose Abreu <joabreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
Only consider that we have an error when HW Timestamping is not enabled as this can give false positives due to the fact the RX Timestamping in XGMAC and GMAC cores comes from context descriptors. Signed-off-by: NJose Abreu <joabreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
Implement filters for Layer 3 and Layer 4 using TC Flower API. Add the corresponding callbacks in XGMAC core. Signed-off-by: NJose Abreu <joabreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 23 8月, 2019 1 次提交
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由 Markus Elfring 提交于
The dev_kfree_skb() function performs also input parameter validation. Thus the test around the shown calls is not needed. This issue was detected by using the Coccinelle software. Signed-off-by: NMarkus Elfring <elfring@users.sourceforge.net> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 18 8月, 2019 6 次提交
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由 Jose Abreu 提交于
Adds the logic to insert a given VLAN ID in a packet. This is offloaded to HW and its descriptor based. For now, only XGMAC implements the necessary callbacks. Signed-off-by: NJose Abreu <joabreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
Add the support for Source Address Insertion and Replacement in XGMAC cores. Two methods are supported: Descriptor based and register based. Signed-off-by: NJose Abreu <joabreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
Add a counter that increments each time a packet with split header is received. Signed-off-by: NJose Abreu <joabreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
Add the support for Split Header feature in the RX path and enable it in XGMAC cores. This does not impact neither beneficts bandwidth but it does reduces CPU usage because without the feature all the entire packet is memcpy'ed, while that with the feature only the header is. With Split Header disabled 'perf stat -d' gives: 86870.624945 task-clock (msec) # 0.429 CPUs utilized 1073352 context-switches # 0.012 M/sec 1 cpu-migrations # 0.000 K/sec 213 page-faults # 0.002 K/sec 327113872376 cycles # 3.766 GHz (62.53%) 56618161216 instructions # 0.17 insn per cycle (75.06%) 10742205071 branches # 123.658 M/sec (75.36%) 584309242 branch-misses # 5.44% of all branches (75.19%) 17594787965 L1-dcache-loads # 202.540 M/sec (74.88%) 4003773131 L1-dcache-load-misses # 22.76% of all L1-dcache hits (74.89%) 1313301468 LLC-loads # 15.118 M/sec (49.75%) 355906510 LLC-load-misses # 27.10% of all LL-cache hits (49.92%) With Split Header enabled 'perf stat -d' gives: 49324.456539 task-clock (msec) # 0.245 CPUs utilized 2542387 context-switches # 0.052 M/sec 1 cpu-migrations # 0.000 K/sec 213 page-faults # 0.004 K/sec 177092791469 cycles # 3.590 GHz (62.30%) 68555756017 instructions # 0.39 insn per cycle (75.16%) 12697019382 branches # 257.418 M/sec (74.81%) 442081897 branch-misses # 3.48% of all branches (74.79%) 20337958358 L1-dcache-loads # 412.330 M/sec (75.46%) 3820210140 L1-dcache-load-misses # 18.78% of all L1-dcache hits (75.35%) 1257719198 LLC-loads # 25.499 M/sec (49.73%) 685543923 LLC-load-misses # 54.51% of all LL-cache hits (49.86%) Changes from v2: - Reword commit message (Jakub) Changes from v1: - Add performance info (David) - Add misssing dma_sync_single_for_device() Signed-off-by: NJose Abreu <joabreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
In order to add Split Header support, stmmac_rx() needs to take into account that packet may be split accross multiple descriptors. Refactor the logic of this function in order to support this scenario. Changes from v2: - Fixup if condition detection (Jakub) - Don't stop NAPI with unfinished packet (Jakub) - Use napi_alloc_skb() (Jakub) Signed-off-by: NJose Abreu <joabreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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由 Jose Abreu 提交于
TX Timestamp in XGMAC comes from MAC instead of descriptors. Implement this in a new callback. Also, RX Timestamp in XGMAC must be cheked against corruption and we need a barrier to make sure that descriptor fields are read correctly. Changes from v2: - Rework return code check (Jakub) Changes from v1: - Rework the get timestamp function (David) Signed-off-by: NJose Abreu <joabreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 11 8月, 2019 1 次提交
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由 Greg Kroah-Hartman 提交于
When calling debugfs functions, there is no need to ever check the return value. The function can work or not, but the code logic should never do something different based on this. Because we don't care about the individual files, we can remove the stored dentry for the files, as they are not needed to be kept track of at all. Cc: Giuseppe Cavallaro <peppe.cavallaro@st.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Jose Abreu <joabreu@synopsys.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: netdev@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 09 8月, 2019 1 次提交
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由 Jose Abreu 提交于
Implement the VLAN Hash Filtering feature in XGMAC core. Signed-off-by: NJose Abreu <joabreu@synopsys.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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