- 05 1月, 2018 1 次提交
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由 Andrew Morton 提交于
gcc -fisolate-erroneous-paths-dereference can generate calls to abort() from modular code too. [arnd@arndb.de: drop duplicate exports of abort()] Link: http://lkml.kernel.org/r/20180102103311.706364-1-arnd@arndb.deReported-by: NVineet Gupta <Vineet.Gupta1@synopsys.com> Cc: Sudip Mukherjee <sudipm.mukherjee@gmail.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Alexey Brodkin <Alexey.Brodkin@synopsys.com> Cc: Russell King <rmk+kernel@armlinux.org.uk> Cc: Jose Abreu <Jose.Abreu@synopsys.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 22 12月, 2017 2 次提交
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由 Arnd Bergmann 提交于
dtc points out that the parent node of the interrupt controllers is not actually an interrupt controller itself, and lacks an #interrupt-cells property: arch/arm/boot/dts/tango4-vantage-1172.dtb: Warning (interrupts_property): Missing #interrupt-cells in interrupt-parent /soc/interrupt-controller@6e000 This removes the annotation. Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Arnd Bergmann 提交于
dtc warns about two 'clocks' properties that have an extraneous '1' at the end: arch/arm/boot/dts/ls1021a-qds.dtb: Warning (clocks_property): arch/arm/boot/dts/ls1021a-twr.dtb: Warning (clocks_property): Property 'clocks', cell 1 is not a phandle reference in /soc/i2c@2180000/mux@77/i2c@4/sgtl5000@2a arch/arm/boot/dts/ls1021a-qds.dtb: Warning (clocks_property): Missing property '#clock-cells' in node /soc/interrupt-controller@1400000 or bad phandle (referred from /soc/i2c@2180000/mux@77/i2c@4/sgtl5000@2a:clocks[1]) Property 'clocks', cell 1 is not a phandle reference in /soc/i2c@2190000/sgtl5000@a arch/arm/boot/dts/ls1021a-twr.dtb: Warning (clocks_property): Missing property '#clock-cells' in node /soc/interrupt-controller@1400000 or bad phandle (referred from /soc/i2c@2190000/sgtl5000@a:clocks[1]) The clocks that get referenced here are fixed-rate, so they do not take any argument, and dtc interprets the next cell as a phandle, which is invalid. Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 21 12月, 2017 2 次提交
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由 Joel Stanley 提交于
This should have always been 8. Fixes: db4d6d9d ("ARM: dts: aspeed: Correctly order UART nodes") Cc: stable@vger.kernel.org Signed-off-by: NJoel Stanley <joel@jms.id.au> Reviewed-by: NCédric Le Goater <clg@kaod.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Javier Martinez Canillas 提交于
Commit 1cb686c0 ("ARM: dts: exynos: Add status property to Exynos 542x Mixer nodes") disabled the Mixer node by default in the DTSI and enabled for each Exynos 542x DTS. But unfortunately it missed to enable it for the Exynos5800 Peach Pi machine, since the 5800 is also an 542x SoC variant. Fixes: 1cb686c0 ("ARM: dts: exynos: Add status property to Exynos 542x Mixer nodes") Signed-off-by: NJavier Martinez Canillas <javierm@redhat.com> Acked-by: NMarek Szyprowski <m.szyprowski@samsung.com> Tested-by: NGuillaume Tucker <guillaume.tucker@collabora.com> Signed-off-by: NKrzysztof Kozlowski <krzk@kernel.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 19 12月, 2017 1 次提交
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由 Maxime Ripard 提交于
When we added the regulator support in commit 90c5d7cd ("ARM: dts: sun8i: a711: Add regulator support"), we also dropped the PMIC's compatible. Since it's not in the PMIC DTSI, unlike most other PMIC DTSI, it obviously wasn't probing anymore. Re-add it so that everything works again. Fixes: 90c5d7cd ("ARM: dts: sun8i: a711: Add regulator support") Reviewed-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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- 18 12月, 2017 1 次提交
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由 Chunyan Zhang 提交于
An additional 'ip' will be pushed to the stack, for restoring the DACR later, if CONFIG_CPU_SW_DOMAIN_PAN defined. However, the fixup still get the err_ptr by add #8*4 to sp, which results in the fact that the code area pointed by the LR will be overwritten, or the kernel will crash if CONFIG_DEBUG_RODATA is enabled. This patch fixes the stack mismatch. Fixes: a5e090ac ("ARM: software-based priviledged-no-access support") Signed-off-by: NLvqiang Huang <Lvqiang.Huang@spreadtrum.com> Signed-off-by: NChunyan Zhang <zhang.lyra@gmail.com> Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
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- 14 12月, 2017 1 次提交
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由 Russell King 提交于
Use XAUI rather than XGMII for DSA link ports, as this is the interface mode that the switches actually use. XAUI is the 4 lane bus with clock per direction, whereas XGMII is a 32 bit bus with clock. Signed-off-by: NRussell King <rmk+kernel@armlinux.org.uk> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 08 12月, 2017 1 次提交
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由 Alejandro Mery 提交于
fix mmc entries in dm365's dma_slave_map to match the actual device names Fixes: 0c750e1f ("ARM: davinci: dm365: Add dma_slave_map to edma") Signed-off-by: NAlejandro Mery <amery@hanoverdisplays.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 07 12月, 2017 5 次提交
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由 Arnd Bergmann 提交于
In configurations without CONFIG_OMAP3 but with secure RAM support, we now run into a link failure: arch/arm/mach-omap2/omap-secure.o: In function `omap3_save_secure_ram': omap-secure.c:(.text+0x130): undefined reference to `save_secure_ram_context' The omap3_save_secure_ram() function is only called from the OMAP34xx power management code, so we can simply hide that function in the appropriate #ifdef. Fixes: d09220a8 ("ARM: OMAP2+: Fix SRAM virt to phys translation for save_secure_ram_context") Acked-by: NTony Lindgren <tony@atomide.com> Tested-by: NDan Murphy <dmurphy@ti.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Rob Herring 提交于
"usb-nop-xceiv" is using the phy binding, but is missing #phy-cells property. This is probably because the binding was the precursor to the phy binding. Fixes the following warning in nspire dts files: Warning (phys_property): Missing property '#phy-cells' in node ... Signed-off-by: NRob Herring <robh@kernel.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 David Lechner 提交于
This fixes the battery voltage monitoring gpio-hog settings. When the gpio is low, it turns off the battery voltage to the ADC chip. However, this needs to be on all of the time so that we can monitor battery voltage. Also, there was a typo that prevented pinmuxing from working correctly. Signed-off-by: NDavid Lechner <david@lechnology.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Alejandro Mery 提交于
Add dma_mask to dm365's EDMA device. Without a valid dma_mask, EDMA on DM365 refuses to probe. Fixes: cef5b0da ("ARM: davinci: Add dma_mask to eDMA devices") Reviewed-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NAlejandro Mery <amery@hanoverdisplays.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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由 Alejandro Mery 提交于
Convert the DM365 EDMA platform device creation to use struct platform_device_info XXXXXX __initconst and platform_device_register_full() This will allow us to specify the dma_mask for the device in an upcoming patch. Without this, EDMA on DM365 refuses to probe. Fixes: 7ab388e8 ("ARM: davinci: Use platform_device_register_full() to create pdev for eDMA") Reviewed-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NAlejandro Mery <amery@hanoverdisplays.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com>
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- 06 12月, 2017 2 次提交
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由 Tony Lindgren 提交于
We have phy-cells for usb_phy0, but it's missing for usb_phy1 and we get: Warning (phys_property): Missing property '#phy-cells' in node /ocp/l4ls@48000000/control@140000/usb-phy@1b00 or bad phandle (referred from /ocp/usb@47400000/usb@47401800:phys[0]) Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Looks like the interrupt property is missing the controller and level information causing: Warning (interrupts_property): interrupts size is (4), expected multiple of 12 in /ocp/elm@48078000 Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 05 12月, 2017 3 次提交
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由 Hendrik Brueckner 提交于
Commit 0515e599 ("bpf: introduce BPF_PROG_TYPE_PERF_EVENT program type") introduced the bpf_perf_event_data structure which exports the pt_regs structure. This is OK for multiple architectures but fail for s390 and arm64 which do not export pt_regs. Programs using them, for example, the bpf selftest fail to compile on these architectures. For s390, exporting the pt_regs is not an option because s390 wants to allow changes to it. For arm64, there is a user_pt_regs structure that covers parts of the pt_regs structure for use by user space. To solve the broken uapi for s390 and arm64, introduce an abstract type for pt_regs and add an asm/bpf_perf_event.h file that concretes the type. An asm-generic header file covers the architectures that export pt_regs today. The arch-specific enablement for s390 and arm64 follows in separate commits. Reported-by: NThomas Richter <tmricht@linux.vnet.ibm.com> Fixes: 0515e599 ("bpf: introduce BPF_PROG_TYPE_PERF_EVENT program type") Signed-off-by: NHendrik Brueckner <brueckner@linux.vnet.ibm.com> Reviewed-and-tested-by: NThomas Richter <tmricht@linux.vnet.ibm.com> Acked-by: NAlexei Starovoitov <ast@kernel.org> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Daniel Borkmann <daniel@iogearbox.net> Signed-off-by: NDaniel Borkmann <daniel@iogearbox.net>
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由 Chen-Yu Tsai 提交于
When the HDMI controller device node was added, the needed PLL clock macros were not exported. A separate patch addresses that, but it is merged through a different tree. Now that both patches are in mainline proper, we can convert the raw numbers to proper macros. Signed-off-by: NChen-Yu Tsai <wens@csie.org> Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Peter Rosin 提交于
The I2C adapter driver is sometimes slow, causing the SCL line to be stuck low for more than the stipulated SMBUS timeout of 25-35 ms. This causes the client device to give up which in turn causes silent corruption of data. So, disable the SMBUS timeout in the client device. Signed-off-by: NPeter Rosin <peda@axentia.se> Acked-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com>
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- 04 12月, 2017 1 次提交
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由 Rob Herring 提交于
The interrupts property in the iep-IOMMU node for the rk3288 dts file has a spurious extra cell causing a dtc warning: Warning (interrupts_property): interrupts size is (16), expected multiple of 12 in /iommu@ff900800 Remove the extra cell. Signed-off-by: NRob Herring <robh@kernel.org> Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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- 03 12月, 2017 2 次提交
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由 Rob Herring 提交于
"usb-nop-xceiv" is using the phy binding, but is missing #phy-cells property. This is probably because the binding was the precursor to the phy binding. Fixes the following warning in Marvell dts files: Warning (phys_property): Missing property '#phy-cells' in node ... Signed-off-by: NRob Herring <robh@kernel.org> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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由 Heiko Stuebner 提交于
The rk3066 also has operating points now, but without adjusting the cpu-regulator will break once higher voltages are needed for a specific frequency, so add the needed cpu0-regulator. Signed-off-by: NHeiko Stuebner <heiko@sntech.de>
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- 01 12月, 2017 3 次提交
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由 Colin Ian King 提交于
Trivial fix to spelling mistake in pr_err error message Signed-off-by: NColin Ian King <colin.king@canonical.com> Acked-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Martin Blumenstingl 提交于
commit 200a575b ("ARM: dts: meson: organize devices in their corresponding busses") organized all peripherals in busses so that the base register offset of the bus doesn't have to be included in all child-nodes anymore. The GPIO interrupt controller however specifies the register offset without subtracting the "cbus" base address. This leads to a problem where of_iomap inside the irq-meson-gpio driver fails because it actually tries to map 0x182209880 (cbus base = 0xc1100000 + 0xc1109880 for the GPIO interrupt controller). Fix this by using 0x9880 as register offset. Fixes: 7d32bc03 ("ARM: dts: meson8b: enable gpio interrupt controller") Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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由 Martin Blumenstingl 提交于
Nodes are sorted by their register start address. Move gpio_intc to the correct position. No functional changes intended. Fixes: 7d32bc03 ("ARM: dts: meson8b: enable gpio interrupt controller") Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: NJerome Brunet <jbrunet@baylibre.com> Signed-off-by: NKevin Hilman <khilman@baylibre.com>
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- 30 11月, 2017 1 次提交
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由 Dan Williams 提交于
In response to compile breakage introduced by a series that added the pud_write helper to x86, Stephen notes: did you consider using the other paradigm: In arch include files: #define pud_write pud_write static inline int pud_write(pud_t pud) ..... Then in include/asm-generic/pgtable.h: #ifndef pud_write tatic inline int pud_write(pud_t pud) { .... } #endif If you had, then the powerpc code would have worked ... ;-) and many of the other interfaces in include/asm-generic/pgtable.h are protected that way ... Given that some architecture already define pmd_write() as a macro, it's a net reduction to drop the definition of __HAVE_ARCH_PMD_WRITE. Link: http://lkml.kernel.org/r/151129126721.37405.13339850900081557813.stgit@dwillia2-desk3.amr.corp.intel.comSigned-off-by: NDan Williams <dan.j.williams@intel.com> Suggested-by: NStephen Rothwell <sfr@canb.auug.org.au> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com> Cc: Oliver OHalloran <oliveroh@au1.ibm.com> Cc: Chris Metcalf <cmetcalf@mellanox.com> Cc: Russell King <linux@armlinux.org.uk> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Arnd Bergmann <arnd@arndb.de> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 29 11月, 2017 7 次提交
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由 Alex Bennée 提交于
After emulating instructions we may want return to user-space to handle single-step debugging. Introduce a helper function, which, if single-step is enabled, sets the run structure for return and returns true. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Reviewed-by: NJulien Thierry <julien.thierry@arm.com> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
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由 Marc Zyngier 提交于
VTTBR_BADDR_MASK is used to sanity check the size and alignment of the VTTBR address. It seems to currently be off by one, thereby only allowing up to 39-bit addresses (instead of 40-bit) and also insufficiently checking the alignment. This patch fixes it. This patch is the 32bit pendent of Kristina's arm64 fix, and she deserves the actual kudos for pinpointing that one. Fixes: f7ed45be ("KVM: ARM: World-switch implementation") Cc: <stable@vger.kernel.org> # 3.9 Reported-by: NKristina Martsenko <kristina.martsenko@arm.com> Reviewed-by: NChristoffer Dall <christoffer.dall@linaro.org> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org>
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由 Fabio Estevam 提交于
This reverts commit 5b725054. The rtc block on i.MX53 is a completely different hardware than the one found on i.MX25. Cc: <stable@vger.kernel.org> #4.14 Reported-by: NNoel Vellemans <Noel.Vellemans@visionbms.com> Suggested-by: NJuergen Borleis <jbe@pengutronix.de> Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Fabio Estevam 提交于
at24mac602 should be at the I2C address 0x50, so that it matches the 'reg' property. Fixes: d4cd1581 ("ARM: dts: vf610-zii-dev: Add .dts file for rev. C") Signed-off-by: NFabio Estevam <fabio.estevam@nxp.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
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由 Peter Ujfalusi 提交于
The DMA binding for eDMA needs 2 parameters, not 1. The second, missing parameter is the tptc to be used for the channel. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Peter Ujfalusi 提交于
Fixes the following warnings: arch/arm/boot/dts/am437x-cm-t43.dtb: Warning (interrupts_property): interrupts size is (8), expected multiple of 12 in /ocp@44000000/mcasp@48038000 arch/arm/boot/dts/am437x-cm-t43.dtb: Warning (interrupts_property): interrupts size is (8), expected multiple of 12 in /ocp@44000000/mcasp@4803C000 Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Adam Ford 提交于
The pin assignment for the wl127x interrupt was incorrect. I am not sure how this every worked. This also eliminates a conflict with the SMC911x ethernet driver and properly moves pinmuxes for the related gpio to omap3_pmx_wkup from omap3_pmx_core. Fixes: ab8dd3ae ("ARM: DTS: Add minimal Support for Logic PD DM3730 SOM-LV") Signed-off-by: NAdam Ford <aford173@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 28 11月, 2017 7 次提交
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由 Adam Ford 提交于
This patch fixes and issue where the NAND and GPMC based ethernet controller stopped working. This also updates the GPMC settings to be consistent with the Logic PD Torpedo development from the commit listed above. Fixes: 44e47164 ("ARM: dts: omap3: Fix NAND device nodes") Signed-off-by: NAdam Ford <aford173@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
There's been a reproducable USB OHCI/EHCI cpuidle related hang on omap4 for a while that happens after about 20 - 40 minutes on an idle system with some data feeding device being connected, like a USB GPS device or a cellular modem. This issue happens in cpuidle states C2 and C3 and does not happen if cpuidle is limited to C1 state only. The symptoms are that the whole system hangs and never wakes up from idle, and if a watchdog is configured the system reboots after a while. Turns out that OHCI/EHCI devices on omap4 are trying to use the GIC interrupt controller directly as a parent instead of the WUGEN. We need to pass the interrupts through WUGEN to GIC to provide the wakeup events for the processor. Let's fix the issue by removing the gic interrupt-parent and use the default interrupt-parent wakeupgen instead. Note that omap5.dtsi had this already fixes earlier by commit 7136d457 ("ARM: omap: convert wakeupgen to stacked domains") but we somehow missed omap4 at that point. Fixes: 7136d457 ("ARM: omap: convert wakeupgen to stacked domains") Cc: Dave Gerlach <d-gerlach@ti.com> Cc: Nishanth Menon <nm@ti.com> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Sebastian Reichel <sebastian.reichel@collabora.co.uk> Reviewed-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Dan Carpenter 提交于
We need to set the error code if omap_device_alloc() fails. Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Keerthy 提交于
Referring TRM Am335X series: http://www.ti.com/lit/ug/spruh73p/spruh73p.pdf The LastPowerStateEntered bitfield is present only for PM_CEFUSE domain. This is not present in any of the other power domains. Hence remove the generic am33xx_pwrdm_read_prev_pwrst hook which wrongly reads the reserved bit fields for all the other power domains. Reading the reserved bits leads to wrongly interpreting the low power transitions for various power domains that do not have the LastPowerStateEntered field. The pm debug counters values are wrong currently as we are incrementing them based on the reserved bits. Signed-off-by: NKeerthy <j-keerthy@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
With the CMA changes from Joonsoo Kim <iamjoonsoo.kim@lge.com>, it was noticed that n900 stopped booting. After investigating it turned out that n900 save_secure_ram_context does some whacky virtual to physical address translation for the SRAM data address. As we now only have minimal parts of omap3 idle code copied to SRAM, running save_secure_ram_context() in SRAM is not needed. It only gets called on PM init. And it seems there's no need to ever call this from SRAM idle code. So let's just keep save_secure_ram_context() in DDR, and pass it the physical address of the parameters. We can do everything else in omap-secure.c like we already do for other secure code. And since we don't have any documentation, I still have no clue what the values for 0, 1 and 1 for the parameters might be. If somebody has figured it out, please do send a patch to add some comments. Debugged-by: NJoonsoo Kim <iamjoonsoo.kim@lge.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Florian Fainelli 提交于
Booting a kernel results in the kernel warning us about the following PPI interrupts configuration: [ 0.105127] smp: Bringing up secondary CPUs ... [ 0.110545] GIC: PPI11 is secure or misconfigured [ 0.110551] GIC: PPI13 is secure or misconfigured Fix this by using the appropriate edge configuration for PPI11 and PPI13, this is similar to what was fixed for Northstar (BCM5301X) in commit 0e34079c ("ARM: dts: BCM5301X: Correct GIC_PPI interrupt flags"). Fixes: 7b2e987d ("ARM: NSP: add minimal Northstar Plus device tree") Fixes: 1a9d53ca ("ARM: dts: NSP: Add TWD Support to DT") Acked-by: NJon Mason <jon.mason@broadcom.com> Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
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由 Florian Fainelli 提交于
The AHCI controller is currently enabled for all of these boards: bcm958623hr and bcm958625hr would result in a hard hang on boot that we cannot get rid of. Since this does not appear to have an easy and simple fix, just disable the AHCI controller for now until this gets resolved. Fixes: 70725d6e ("ARM: dts: NSP: Enable SATA on bcm958625hr") Fixes: d454c376 ("ARM: dts: NSP: Add new DT file for bcm958623hr") Acked-by: NJon Mason <jon.mason@broadcom.com> Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
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