The R-Car Gen2 SoCs (R8A7790 and R8A7791) have several clocks that are
too custom to be supported in a generic driver. Those clocks can be
divided in two categories:

- Fixed rate clocks with multiplier and divisor set according to boot
  mode configuration

- Custom divider clocks with SoC-specific divider values

This driver supports both.
Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Acked-by: NKumar Gala <galak@codeaurora.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Commit b5b4bb3f (of: only include prom.h on sparc) removed implicit
includes of of_*.h headers by powerpc's prom.h. Some components were
missed in initial clean-up patch, so add the necessary includes to fix
powerpc builds.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Tejun Heo <tj@kernel.org>
Cc: Matt Mackall <mpm@selenic.com>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Vinod Koul <vinod.koul@intel.com>
Cc: Dan Williams <dan.j.williams@intel.com>
Cc: linuxppc-dev@lists.ozlabs.org
Cc: linux-ide@vger.kernel.org
Cc: linux-crypto@vger.kernel.org

This patch adds support for the clocks provided by the Clock Management
Unit of Energy Micro's efm32 Giant Gecko SoCs including device tree
bindings.
Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Due to a typo or similar, the peripheral group 2 clock 11
gate was set to bit 1 instead of bit 11. We need to fix this
to be able to set the correct enable bit in the device tree:
when trying to correct the bit assignment in the device tree,
the system would hang.

Cc: Mike Turquette <mturquette@linaro.org>
Acked-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Just a trivial print message typo fix.
Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Signed-off-by: NJiri Kosina <jkosina@suse.cz>

Walks the "clocks" array of parent clock phandles and returns the
number.
Signed-off-by: NMike Turquette <mturquette@linaro.org>

The order of arguments in the call to vco_set() for the ICST clocks appears to
have been switched in error, which results in the VCO not being initialised
correctly. This in turn stops the integrated LCD on things like Integrator/CP
from working correctly.

This patch fixes the order and restores the expected functionality.
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NJonathan Austin <jonathan.austin@arm.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>
Cc: stable@vger.kernel.org

The zynq_clk_register_fclk function can leak memory (fclk_lock) when unable
to alloc memory for fclk_gate_lock
Signed-off-by: NFelipe Pena <felipensp@gmail.com>
Acked-by: NSören Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

The SD/MMC clock is named "sdmmc_clk", and NOT "mmc_clk". Because of this,
the SD driver was getting the incorrect clock value. This prevented the
SD driver from initializing correctly.
Signed-off-by: NDinh Nguyen <dinguyen@altera.com>
CC: Arnd Bergmann <arnd@arndb.de>
CC: Olof Johansson <olof@lixom.net>
Reviewed-by: NPavel Machek <pavel@denx.de>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Now build the keystone common clock drivers. The build is made
conditional based on COMMON_CLK_KEYSTONE
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Add the driver for the clock gate control which uses PSC (Power Sleep
Controller) IP on Keystone 2 based SOCs. It is responsible for enabling and
disabling of the clocks for different IPs present in the SoC.
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Add the driver for the PLL IPs found on Keystone 2 devices. The PLL
IP typically has a multiplier, a divider and a post-divider. The PLL IPs like
ARMPLL, DDRPLL and PAPLL are controlled by the memory mapped register where
as the Main PLL is controlled by a PLL controller and memory map registers.
Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

nomadik_src_init references __initconst sections but lacks an __init
itself. Add __init to fix the section mismatch.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

clk: Add APM X-Gene SoC clock driver for reference, PLL, and device clocks.
Signed-off-by: NLoc Ho <lho@apm.com>
Signed-off-by: NKumar Sankaran <ksankaran@apm.com>
Signed-off-by: NVinayak Kale <vkale@apm.com>
Signed-off-by: NFeng Kan <fkan@apm.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

This patch fixes the tclk frequency array for the Armada-370 SoC.
This bug has been introduced by commit 6b72333d
("clk: mvebu: add Armada 370 SoC-centric clock init").

A wrong tclk frequency affects the following drivers: mvsdio, mvneta,
i2c-mv64xxx and mvebu-devbus. This list may be incomplete.

About the mvneta Ethernet driver, note that the tclk frequency is used
to compute the Rx time coalescence. Then, this bug harms the coalescence
configuration and also degrades the networking performances with the
default values.
Signed-off-by: NSimon Guinot <simon.guinot@sequanux.org>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory CLEMENT <gregory.clement@free-electrons.com>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: NJason Cooper <jason@lakedaemon.net>
Cc: stable@vger.kernel.org
Signed-off-by: NMichael Turquette <mturquette@deferred.io>

The remove function implemented for platform driver's remove callback
just return 0 as part of its implementation.

Remove this APIs and do not pass the valid .remove for platform driver.
Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com>
Acked-by: NMark Brown <broonie@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

This fixes a regression for the Nomadik on the main system
timers.

The Nomadik seemed a bit slow and its heartbeat wasn't looking
healthy. And it was not strange, because it has been connected
to the 32768 Hz clock at boot, while being told by the clock driver
that it was 2.4MHz. Actually connect the TIMCLK to 2.4MHz by
default as this is what we want for nice scheduling, clocksource
and clock event.

Cc: stable@vger.kernel.org
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

This function is supposed to iterate over all parents of given child
clock to find the index of given parent clock in its parent list,
using parent cache if possible and falling back to string compare
otherwise. However currently the logic falls back to string compare in
every iteration in which clock cache entry does not match given parent,
due to wrong check conditions.

This patch corrects the logic to continue the loop if parent cache entry
is present and does not match requested parent clock. In addition,
redundant checks for parent cache array presence are removed, because it
is always allocated in the beginning of the function.
Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

Instead of calculating sizes of arrays manually, kcalloc() can be used
to allocate arrays of elements with defined size. This is just a cleanup
patch without any functional changes.
Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

There are at least two different error cases that can happen in
clk_fetch_parent_index() function:
 - allocation failure,
 - parent clock lookup failure,
however it returns only an u8, which is supposed to contain parent clock
index.

This patch modified the function to return full int instead allowing
positive clock indices and negative error codes to be returned. All
users of this function are adjusted as well to handle the return value
correctly.
Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

This patch converts clk-imx2[38] clocksource_of_init compatible init
associated with fsl,imx2[38]-clkctrl. With arch/arm calling
of_clk_init(NULL) from time_init(), we can now also remove custom
.init_time hooks.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: NMike Turquette <mturquette@linaro.org>
Acked-by: NShawn Guo <shawn.guo@linaro.org>

With arch/arm calling of_clk_init(NULL) from time_init(), we can now
remove custom .init_time hooks. Highbank clock provider need a reference
to system registers, as a workaround current clk driver maps those
independent of arch code now.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: NRob Herring <rob.herring@calxeda.com>
Acked-by: NMike Turquette <mturquette@linaro.org>

With arch/arm calling of_clk_init(NULL) from time_init(), we can now
remove custom .init_time hooks. Also remove call to of_clk_init from
clk-bcm2835 with core fixed_clock match, as this has already been
registered now.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: NStephen Warren <swarren@wwwdotorg.org>
Acked-by: NMike Turquette <mturquette@linaro.org>

Current vt8500 board init calls of_clk_init() from vtwm_clk_init. To allow
consolidation of DT driven .time_init, move of_clock_init() to a temporary
.time_init callback that will be removed when arch-wide callback is available.
With previous pmc_base parsing helper for vt8500 clock providers, we can also
safely remove the call to vtwm_clk_init() and get rid of some includes.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: NTony Prisk <linux@prisktech.co.nz>
Acked-by: NMike Turquette <mturquette@linaro.org>

Currently, clock providers for vt8500 depend on machine_init providing
pmc_base address before calling of_clk_init. With upcoming arch-wide
.time_init calling of_clk_init, we should make clock providers independent
of mach code. This adds a pmc_base parsing helper to current clock provider
that gets called if there is no pmc_base set, yet.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: NTony Prisk <linux@prisktech.co.nz>
Acked-by: NMike Turquette <mturquette@linaro.org>

Common clock framework allows to register clock providers to get called
on of_clk_init() by using CLK_OF_DECLARE. This converts sunxi clock
providers to make use of it and get rid of the mach specific clk init
call. As sunxi has a bunch of independent clk provider nodes, we hook
current clock init to board compatible to make it called once.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: NMike Turquette <mturquette@linaro.org>

Common clock framework allows to register clock providers to get called
on of_clk_init() by using CLK_OF_DECLARE. This converts prima2 clock
provider to make use of it and get rid of the mach specific clk init
call.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: NBarry Song <baohua.song@csr.com>
Acked-by: NMike Turquette <mturquette@linaro.org>

Common clock framework allows to register clock providers to get called
on of_clk_init() by using CLK_OF_DECLARE. This converts nomadik clock
provider to make use of it and get rid of the mach specific clk init
call. As clocks require system reset controller base address to be
initialized each clock driver checks src_base and calls new
nomadik_src_init if required.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NMike Turquette <mturquette@linaro.org>

nomadik_clk_init currently also maps system reset controller base address
used by clocks and registers a reboot notifier. To allow further cleanup of
nomadik clk setup, this moves system reset controller setup from
nomadik_clk_init to its own function.
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Acked-by: NLinus Walleij <linus.walleij@linaro.org>
Acked-by: NMike Turquette <mturquette@linaro.org>

The ARMSS clock is used by the newly DT enabled CPUFreq driver.

Cc: Mike Turquette <mturquette@linaro.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch enables the TWD fixed factor clock to be specified from
Device Tree via phandles to the "smp-twd-clock" node.
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch enables the RTC fixed frequency clock to be specified from
Device Tree via phandles to the "rtc32k-clock" node.
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch enables clocks to be specified from Device Tree via phandles
to the "prcc-kernel-clock" node.
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch enables clocks to be specified from Device Tree via phandles
to the "prcc-periph-clock" node.
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This patch enables clocks to be specified from Device Tree via phandles
to the "prcmu-clock" node.
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

PRCC (peripheral and kernel) clocks are specified using a property tuple
<&phandle base bit>, where 'base' is the peripheral (1, 2, 3, 5 or 6),
and bit is read-in value into that peripheral stipulated by the hardware
specification.
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

The functional components will be added on a per-clock basis.
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Here we're using the old clock initialisation function as a template.
It's necessary to remove all of the clk_register_clkdev() calls as
they don't make sense when booting with Device Tree.

Cc: Mike Turquette <mturquette@linaro.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

There is no mention of the PRCMU_BML8580CLK in any of the Design
Specifications for the chips supported in Mainline. In fact, where it
is incorrectly used in the u8540 clock definition driver it would
have the side effect of using the incorrect clock management address
([PRCM_BML8580CLK_MGT] 0x108 instead of the correct value 0x04C).
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

This fixes a regression for the Nomadik on the main system
timers.

The Nomadik seemed a bit slow and its heartbeat wasn't looking
healthy. And it was not strange, because it has been connected
to the 32768 Hz clock at boot, while being told by the clock driver
that it was 2.4MHz. Actually connect the TIMCLK to 2.4MHz by
default as this is what we want for nice scheduling, clocksource
and clock event.

Cc: stable@vger.kernel.org
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>