1. 11 5月, 2016 2 次提交
    • E
      net: nps_enet: bug fix - handle lost tx interrupts · 05c00d82
      Elad Kanfi 提交于
      The tx interrupt is of edge type, and in case such interrupt is triggered
      while it is masked it will not be handled even after tx interrupts are
      re-enabled in the end of NAPI poll.
      This will cause tx network to stop in the following scenario:
       * Rx is being handled, hence interrupts are masked.
       * Tx interrupt is triggered after checking if there is some tx to handle
         and before re-enabling the interrupts.
      In this situation only rx transaction will release tx requests.
      
      In order to handle the tx that was missed( if there was one ),
      a NAPI reschdule was added after enabling the interrupts.
      Signed-off-by: NElad Kanfi <eladkan@mellanox.com>
      Acked-by: NNoam Camus <noamca@mellanox.com>
      Acked-by: NGilad Ben-Yossef <giladby@mellanox.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      05c00d82
    • E
      net: nps_enet: Tx handler synchronization · e5df49d5
      Elad Kanfi 提交于
      Below is a description of a possible problematic
      sequence. CPU-A is sending a frame and CPU-B handles
      the interrupt that indicates the frame was sent. CPU-B
      reads an invalid value of tx_packet_sent.
      
      	CPU-A				CPU-B
      	-----				-----
      	nps_enet_send_frame
      	.
      	.
      	tx_skb = skb
      	tx_packet_sent = true
      	order HW to start tx
      	.
      	.
      	HW complete tx
      			    ------> 	get tx complete interrupt
      					.
      					.
      					if(tx_packet_sent == true)
      						handle tx_skb
      
      	end memory transaction
      	(tx_packet_sent actually
      	 written)
      
      Furthermore there is a dependency between tx_skb and tx_packet_sent.
      There is no assurance that tx_skb contains a valid pointer at CPU B
      when it sees tx_packet_sent == true.
      
      Solution:
      
      Initialize tx_skb to NULL and use it to indicate that packet was sent,
      in this way tx_packet_sent can be removed.
      Add a write memory barrier after setting tx_skb in order to make sure
      that it is valid before HW is informed and IRQ is fired.
      
      Fixed sequence will be:
      
             CPU-A                           CPU-B
             -----                           -----
      
      	tx_skb = skb
      	wmb()
      	.
      	.
      	order HW to start tx
      	.
      	.
      	HW complete tx
      			------>		get tx complete interrupt
      					.
      					.
      					if(tx_skb != NULL)
      						handle tx_skb
      
      					tx_skb = NULL
      Signed-off-by: NElad Kanfi <eladkan@mellanox.com>
      Acked-by: NNoam Camus <noamca@mellanox.com>
      Acked-by: NGilad Ben-Yossef <giladby@mellanox.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      e5df49d5
  2. 10 5月, 2016 2 次提交
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