1. 28 12月, 2020 1 次提交
  2. 27 12月, 2020 1 次提交
  3. 26 12月, 2020 4 次提交
    • N
      mfd: ab8500-debugfs: Remove extraneous curly brace · c9a3c4e6
      Nathan Chancellor 提交于
      Clang errors:
      
        drivers/mfd/ab8500-debugfs.c:1526:2: error: non-void function does not return a value [-Werror,-Wreturn-type]
                }
                ^
        drivers/mfd/ab8500-debugfs.c:1528:2: error: expected identifier or '('
        return 0;
                ^
        drivers/mfd/ab8500-debugfs.c:1529:1: error: extraneous closing brace ('}')
        }
        ^
        3 errors generated.
      
      The cleanup in ab8500_interrupts_show left a curly brace around, remove
      it to fix the error.
      
      Fixes: 886c8121 ("mfd: ab8500-debugfs: Remove the racy fiddling with irq_desc")
      Signed-off-by: NNathan Chancellor <natechancellor@gmail.com>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      c9a3c4e6
    • A
      PCI: dwc: Fix inverted condition of DMA mask setup warning · 99e629f1
      Alexander Lobakin 提交于
      Commit 660c4865 ("PCI: dwc: Set 32-bit DMA mask for MSI target address
      allocation") added dma_mask_set() call to explicitly set 32-bit DMA mask
      for MSI message mapping, but for now it throws a warning on ret == 0, while
      dma_set_mask() returns 0 in case of success.
      
      Fix this by inverting the condition.
      
      [bhelgaas: join string to make it greppable]
      Fixes: 660c4865 ("PCI: dwc: Set 32-bit DMA mask for MSI target address allocation")
      Link: https://lore.kernel.org/r/20201222150708.67983-1-alobakin@pm.meSigned-off-by: NAlexander Lobakin <alobakin@pm.me>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      99e629f1
    • R
      PCI: tegra: Fix host link initialization · 275e88b0
      Rob Herring 提交于
      Commit b9ac0f9d ("PCI: dwc: Move dw_pcie_setup_rc() to DWC common
      code") broke enumeration of downstream devices on Tegra:
      
      In non-working case (next-20201211):
      
        0001:00:00.0 PCI bridge: NVIDIA Corporation Device 1ad2 (rev a1)
        0001:01:00.0 SATA controller: Marvell Technology Group Ltd. Device 9171 (rev 13)
        0005:00:00.0 PCI bridge: NVIDIA Corporation Device 1ad0 (rev a1)
      
      In working case (v5.10-rc7):
      
        0001:00:00.0 PCI bridge: Molex Incorporated Device 1ad2 (rev a1)
        0001:01:00.0 SATA controller: Marvell Technology Group Ltd. Device 9171 (rev 13)
        0005:00:00.0 PCI bridge: Molex Incorporated Device 1ad0 (rev a1)
        0005:01:00.0 PCI bridge: PLX Technology, Inc. Device 3380 (rev ab)
        0005:02:02.0 PCI bridge: PLX Technology, Inc. Device 3380 (rev ab)
        0005:03:00.0 USB controller: PLX Technology, Inc. Device 3380 (rev ab)
      
      The problem seems to be dw_pcie_setup_rc() is now called twice before and
      after the link up handling. The fix is to move Tegra's link up handling to
      .start_link() function like other DWC drivers. Tegra is a bit more
      complicated than others as it re-inits the whole DWC controller to retry
      the link. With this, the initialization ordering is restored to match the
      prior sequence.
      
      Fixes: b9ac0f9d ("PCI: dwc: Move dw_pcie_setup_rc() to DWC common code")
      Link: https://lore.kernel.org/r/20201218143905.1614098-1-robh@kernel.orgReported-by: NMian Yousaf Kaukab <ykaukab@suse.de>
      Tested-by: NMian Yousaf Kaukab <ykaukab@suse.de>
      Signed-off-by: NRob Herring <robh@kernel.org>
      Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
      Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
      Cc: Thierry Reding <thierry.reding@gmail.com>
      Cc: Jonathan Hunter <jonathanh@nvidia.com>
      Cc: Vidya Sagar <vidyas@nvidia.com>
      275e88b0
    • L
      drm/amd/display: avoid uninitialized variable warning · 61d79136
      Linus Torvalds 提交于
      clang (quite rightly) complains fairly loudly about the newly added
      mpc1_get_mpc_out_mux() function returning an uninitialized value if the
      'opp_id' checks don't pass.
      
      This may not happen in practice, but the code really shouldn't return
      garbage if the sanity checks don't pass.
      
      So just initialize 'val' to zero to avoid the issue.
      
      Fixes: 110b055b ("drm/amd/display: add getter routine to retrieve mpcc mux")
      Cc: Josip Pavic <Josip.Pavic@amd.com>
      Cc: Bindu Ramamurthy <bindu.r@amd.com>
      Cc: Alex Deucher <alexander.deucher@amd.com>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      61d79136
  4. 25 12月, 2020 2 次提交
    • Z
      device-dax: Avoid an unnecessary check in alloc_dev_dax_range() · ff8da37d
      Zhen Lei 提交于
      Swap the calling sequence of krealloc() and __request_region(), call the
      latter first. In this way, the value of dev_dax->nr_range does not need to
      be considered when __request_region() failed.
      Signed-off-by: NZhen Lei <thunder.leizhen@huawei.com>
      Link: https://lore.kernel.org/r/20201219081840.1149-2-thunder.leizhen@huawei.comSigned-off-by: NDan Williams <dan.j.williams@intel.com>
      ff8da37d
    • D
      device-dax: Fix range release · 6268d7da
      Dan Williams 提交于
      There are multiple locations that open-code the release of the last
      range in a device-dax instance. Consolidate this into a new
      dev_dax_trim_range() helper.
      
      This also addresses a kmemleak report:
      
      # cat /sys/kernel/debug/kmemleak
      [..]
      unreferenced object 0xffff976bd46f6240 (size 64):
         comm "ndctl", pid 23556, jiffies 4299514316 (age 5406.733s)
         hex dump (first 32 bytes):
           00 00 00 00 00 00 00 00 00 00 20 c3 37 00 00 00  .......... .7...
           ff ff ff 7f 38 00 00 00 00 00 00 00 00 00 00 00  ....8...........
         backtrace:
           [<00000000064003cf>] __kmalloc_track_caller+0x136/0x379
           [<00000000d85e3c52>] krealloc+0x67/0x92
           [<00000000d7d3ba8a>] __alloc_dev_dax_range+0x73/0x25c
           [<0000000027d58626>] devm_create_dev_dax+0x27d/0x416
           [<00000000434abd43>] __dax_pmem_probe+0x1c9/0x1000 [dax_pmem_core]
           [<0000000083726c1c>] dax_pmem_probe+0x10/0x1f [dax_pmem]
           [<00000000b5f2319c>] nvdimm_bus_probe+0x9d/0x340 [libnvdimm]
           [<00000000c055e544>] really_probe+0x230/0x48d
           [<000000006cabd38e>] driver_probe_device+0x122/0x13b
           [<0000000029c7b95a>] device_driver_attach+0x5b/0x60
           [<0000000053e5659b>] bind_store+0xb7/0xc3
           [<00000000d3bdaadc>] drv_attr_store+0x27/0x31
           [<00000000949069c5>] sysfs_kf_write+0x4a/0x57
           [<000000004a8b5adf>] kernfs_fop_write+0x150/0x1e5
           [<00000000bded60f0>] __vfs_write+0x1b/0x34
           [<00000000b92900f0>] vfs_write+0xd8/0x1d1
      Reported-by: NJane Chu <jane.chu@oracle.com>
      Cc: Zhen Lei <thunder.leizhen@huawei.com>
      Link: https://lore.kernel.org/r/160834570161.1791850.14911670304441510419.stgit@dwillia2-desk3.amr.corp.intel.comSigned-off-by: NDan Williams <dan.j.williams@intel.com>
      6268d7da
  5. 24 12月, 2020 23 次提交
  6. 23 12月, 2020 4 次提交
  7. 22 12月, 2020 3 次提交
  8. 21 12月, 2020 1 次提交
    • R
      cpufreq: intel_pstate: Use most recent guaranteed performance values · e40ad84c
      Rafael J. Wysocki 提交于
      When turbo has been disabled by the BIOS, but HWP_CAP.GUARANTEED is
      changed later, user space may want to take advantage of this increased
      guaranteed performance.
      
      HWP_CAP.GUARANTEED is not a static value.  It can be adjusted by an
      out-of-band agent or during an Intel Speed Select performance level
      change.  The HWP_CAP.MAX is still the maximum achievable performance
      with turbo disabled by the BIOS, so HWP_CAP.GUARANTEED can still
      change as long as it remains less than or equal to HWP_CAP.MAX.
      
      When HWP_CAP.GUARANTEED is changed, the sysfs base_frequency
      attribute shows the most recent guaranteed frequency value. This
      attribute can be used by user space software to update the scaling
      min/max limits of the CPU.
      
      Currently, the ->setpolicy() callback already uses the latest
      HWP_CAP values when setting HWP_REQ, but the ->verify() callback will
      restrict the user settings to the to old guaranteed performance value
      which prevents user space from making use of the extra CPU capacity
      theoretically available to it after increasing HWP_CAP.GUARANTEED.
      
      To address this, read HWP_CAP in intel_pstate_verify_cpu_policy()
      to obtain the maximum P-state that can be used and use that to
      confine the policy max limit instead of using the cached and
      possibly stale pstate.max_freq value for this purpose.
      
      For consistency, update intel_pstate_update_perf_limits() to use the
      maximum available P-state returned by intel_pstate_get_hwp_max() to
      compute the maximum frequency instead of using the return value of
      intel_pstate_get_max_freq() which, again, may be stale.
      
      This issue is a side-effect of fixing the scaling frequency limits in
      commit eacc9c5a ("cpufreq: intel_pstate: Fix intel_pstate_get_hwp_max()
      for turbo disabled") which corrected the setting of the reduced scaling
      frequency values, but caused stale HWP_CAP.GUARANTEED to be used in
      the case at hand.
      
      Fixes: eacc9c5a ("cpufreq: intel_pstate: Fix intel_pstate_get_hwp_max() for turbo disabled")
      Reported-by: NSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
      Tested-by: NSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
      Cc: 5.8+ <stable@vger.kernel.org> # 5.8+
      Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
      e40ad84c
  9. 20 12月, 2020 1 次提交