1. 15 7月, 2008 2 次提交
    • N
      powerpc: Add PPC_FEATURE_PSERIES_PERFMON_COMPAT · 0f473314
      Nathan Lynch 提交于
      Background from Maynard Johnson:
      As of POWER6, a set of 32 common events is defined that must be
      supported on all future POWER processors.  The main impetus for this
      compat set is the need to support partition migration, especially from
      processor P(n) to processor P(n+1), where performance software that's
      running in the new partition may not be knowledgeable about processor
      P(n+1).  If a performance tool determines it does not support the
      physical processor, but is told (via the
      PPC_FEATURE_PSERIES_PERFMON_COMPAT bit) that the processor supports
      the notion of the PMU compat set, then the performance tool can
      surface just those events to the user of the tool.
      
      PPC_FEATURE_PSERIES_PERFMON_COMPAT indicates that the PMU supports at
      least this basic subset of events which is compatible across POWER
      processor lines.
      Signed-off-by: NNathan Lynch <ntl@pobox.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      0f473314
    • S
      powerpc: Add driver for Barrier Synchronization Register · fe9e8d53
      Sonny Rao 提交于
      Adds a character driver for BSR support on IBM POWER systems including
      Power5 and Power6.  The BSR is an optional processor facility not currently
      implemented by any other processors.  It's primary purpose is fast large SMP
      synchronization.  More details on the BSR are in comments to the code which
      follows.  This patch adds BSR driver to pseries_defconfig.
      Signed-off-by: NSonny Rao <sonnyrao@linux.vnet.ibm.com>
      Signed-off-by: NJoel Schopp <jschopp@austin.ibm.com>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      fe9e8d53
  2. 14 7月, 2008 14 次提交
  3. 13 7月, 2008 9 次提交
  4. 11 7月, 2008 1 次提交
  5. 10 7月, 2008 6 次提交
  6. 09 7月, 2008 8 次提交
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