- 15 10月, 2012 1 次提交
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由 Paul Mundt 提交于
It was already pointed out how to fix these cases before the offending patches were merged, but unsurprisingly, that didn't happen. As this change is entirely superfluous to begin with, simply shut things up by casting everything away. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 24 1月, 2012 4 次提交
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由 Paul Mundt 提交于
This ensures that the sense/prio lists are sorted at registration time, enabling us to use a simple binary search for an optimized lookup (something that had been on the TODO for some time). Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
intc_set_affinity() updates the cpumask in place, so there's no need for the upper layer to do this itself. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
This already gets handled via disable, as per the notes in linux/irq.h. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
It's possible to use IRQCHIP_SKIP_SET_WAKE to get the behaviour that we're after, without having to bother with a dummy ->set_wake() callback for the IRQ chip. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 04 11月, 2011 1 次提交
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由 Magnus Damm 提交于
Enable IRQ_TYPE_EDGE_BOTH on all R/SH-Mobile ARM SoCs. This hardware feature is supported by sh7367, sh7377, sh7372 and sh73a0. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 28 10月, 2011 1 次提交
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由 Magnus Damm 提交于
R-Mobile SoCs such as sh73a0 include PINT blocks in INTC that come with 2-bit IRQ trigger support. Add code to make sure the bit width is checked so 4-bit only modes like for instance EDGE_BOTH will fail for PINT. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 21 7月, 2011 1 次提交
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由 Magnus Damm 提交于
IRQ-capable GPIOs on sh7372 can be configured to produce interrupts on both edges. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 19 1月, 2011 1 次提交
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由 Magnus Damm 提交于
Clear the valid flag is in the INTC code. Without this fix bit 7 of the sense register is mistakenly set. Signed-off-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 27 10月, 2010 1 次提交
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由 Paul Mundt 提交于
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 05 10月, 2010 1 次提交
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由 Paul Mundt 提交于
This splits up the sh intc core in to something more vaguely resembling a subsystem. Most of the functionality was alread fairly well compartmentalized, and there were only a handful of interdependencies that needed to be resolved in the process. This also serves as future-proofing for the genirq and sparseirq rework, which will make some of the split out functionality wholly generic, allowing things to be killed off in place with minimal migration pain. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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