1. 16 8月, 2019 1 次提交
  2. 14 8月, 2019 2 次提交
  3. 13 8月, 2019 4 次提交
  4. 12 8月, 2019 2 次提交
  5. 11 8月, 2019 2 次提交
  6. 10 8月, 2019 3 次提交
  7. 09 8月, 2019 3 次提交
  8. 03 8月, 2019 1 次提交
  9. 02 8月, 2019 5 次提交
    • G
      net/mlx5: Add flow counter pool · 558101f1
      Gavi Teitz 提交于
      Add a pool of flow counters, based on flow counter bulks, removing the
      need to allocate a new counter via a costly FW command during the flow
      creation process. The time it takes to acquire/release a flow counter
      is cut from ~50 [us] to ~50 [ns].
      
      The pool is part of the mlx5 driver instance, and provides flow
      counters for aging flows. mlx5_fc_create() was modified to provide
      counters for aging flows from the pool by default, and
      mlx5_destroy_fc() was modified to release counters back to the pool
      for later reuse. If bulk allocation is not supported or fails, and for
      non-aging flows, the fallback behavior is to allocate and free
      individual counters.
      
      The pool is comprised of three lists of flow counter bulks, one of
      fully used bulks, one of partially used bulks, and one of unused
      bulks. Counters are provided from the partially used bulks first, to
      help limit bulk fragmentation.
      
      The pool maintains a threshold, and strives to maintain the amount of
      available counters below it. The pool is increased in size when a
      counter acquisition request is made and there are no available
      counters, and it is decreased in size when the last counter in a bulk
      is released and there are more available counters than the threshold.
      All pool size changes are done in the context of the
      acquiring/releasing process.
      
      The value of the threshold is directly correlated to the amount of
      used counters the pool is providing, while constrained by a hard
      maximum, and is recalculated every time a bulk is allocated/freed.
      This ensures that the pool only consumes large amounts of memory for
      available counters if the pool is being used heavily. When fully
      populated and at the hard maximum, the buffer of available counters
      consumes ~40 [MB].
      Signed-off-by: NGavi Teitz <gavi@mellanox.com>
      Reviewed-by: NVlad Buslov <vladbu@mellanox.com>
      Signed-off-by: NSaeed Mahameed <saeedm@mellanox.com>
      558101f1
    • E
      net/mlx5: E-Switch, Verify support QoS element type · 6cedde45
      Eli Cohen 提交于
      Check if firmware supports the requested element type before
      attempting to create the element type.
      In addition, explicitly specify the request element type and tsar type.
      Signed-off-by: NEli Cohen <eli@mellanox.com>
      Reviewed-by: NPaul Blakey <paulb@mellanox.com>
      Signed-off-by: NSaeed Mahameed <saeedm@mellanox.com>
      6cedde45
    • S
      net/mlx5: Fix offset of tisc bits reserved field · 7761f9ee
      Saeed Mahameed 提交于
      First reserved field is off by one instead of reserved_at_1 it should be
      reserved_at_2, fix that.
      
      Fixes: a12ff35e ("net/mlx5: Introduce TLS TX offload hardware bits and structures")
      Signed-off-by: NSaeed Mahameed <saeedm@mellanox.com>
      Reviewed-by: NLeon Romanovsky <leonro@mellanox.com>
      Signed-off-by: NSaeed Mahameed <saeedm@mellanox.com>
      7761f9ee
    • G
      net/mlx5: Add flow counter bulk allocation hardware bits and command · 8536a6bf
      Gavi Teitz 提交于
      Add a handle to invoke the new FW capability of allocating a bulk of
      flow counters.
      Signed-off-by: NGavi Teitz <gavi@mellanox.com>
      Reviewed-by: NVlad Buslov <vladbu@mellanox.com>
      Signed-off-by: NSaeed Mahameed <saeedm@mellanox.com>
      8536a6bf
    • G
      net/mlx5: Refactor and optimize flow counter bulk query · 6f06e04b
      Gavi Teitz 提交于
      Towards introducing the ability to allocate bulks of flow counters,
      refactor the flow counter bulk query process, removing functions and
      structs whose names indicated being used for flow counter bulk
      allocation FW commands, despite them actually only being used to
      support bulk querying, and migrate their functionality to correctly
      named functions in their natural location, fs_counters.c.
      
      Additionally, optimize the bulk query process by:
       * Extracting the memory used for the query to mlx5_fc_stats so
         that it is only allocated once, and not for each bulk query.
       * Querying all the counters in one function call.
      Signed-off-by: NGavi Teitz <gavi@mellanox.com>
      Reviewed-by: NVlad Buslov <vladbu@mellanox.com>
      Signed-off-by: NSaeed Mahameed <saeedm@mellanox.com>
      6f06e04b
  10. 01 8月, 2019 1 次提交
  11. 31 7月, 2019 7 次提交
  12. 30 7月, 2019 2 次提交
  13. 29 7月, 2019 3 次提交
  14. 28 7月, 2019 2 次提交
    • B
      gpio: don't WARN() on NULL descs if gpiolib is disabled · ffe0bbab
      Bartosz Golaszewski 提交于
      If gpiolib is disabled, we use the inline stubs from gpio/consumer.h
      instead of regular definitions of GPIO API. The stubs for 'optional'
      variants of gpiod_get routines return NULL in this case as if the
      relevant GPIO wasn't found. This is correct so far.
      
      Calling other (non-gpio_get) stubs from this header triggers a warning
      because the GPIO descriptor couldn't have been requested. The warning
      however is unconditional (WARN_ON(1)) and is emitted even if the passed
      descriptor pointer is NULL.
      
      We don't want to force the users of 'optional' gpio_get to check the
      returned pointer before calling e.g. gpiod_set_value() so let's only
      WARN on non-NULL descriptors.
      
      Cc: stable@vger.kernel.org
      Reported-by: NClaus H. Stovgaard <cst@phaseone.com>
      Signed-off-by: NBartosz Golaszewski <bgolaszewski@baylibre.com>
      ffe0bbab
    • T
      net: stmmac: Make MDIO bus reset optional · 1a981c05
      Thierry Reding 提交于
      The Tegra EQOS driver already resets the MDIO bus at probe time via the
      reset GPIO specified in the phy-reset-gpios device tree property. There
      is no need to reset the bus again later on.
      
      This avoids the need to query the device tree for the snps,reset GPIO,
      which is not part of the Tegra EQOS device tree bindings. This quiesces
      an error message from the generic bus reset code if it doesn't find the
      snps,reset related delays.
      Signed-off-by: NThierry Reding <treding@nvidia.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      1a981c05
  15. 27 7月, 2019 2 次提交