1. 30 8月, 2019 1 次提交
  2. 19 6月, 2019 1 次提交
  3. 06 5月, 2019 1 次提交
    • R
      mmc: core: Verify SD bus width · 9e4be8d0
      Raul E Rangel 提交于
      The SD Physical Layer Spec says the following: Since the SD Memory Card
      shall support at least the two bus modes 1-bit or 4-bit width, then any SD
      Card shall set at least bits 0 and 2 (SD_BUS_WIDTH="0101").
      
      This change verifies the card has specified a bus width.
      
      AMD SDHC Device 7806 can get into a bad state after a card disconnect
      where anything transferred via the DATA lines will always result in a
      zero filled buffer. Currently the driver will continue without error if
      the HC is in this condition. A block device will be created, but reading
      from it will result in a zero buffer. This makes it seem like the SD
      device has been erased, when in actuality the data is never getting
      copied from the DATA lines to the data buffer.
      
      SCR is the first command in the SD initialization sequence that uses the
      DATA lines. By checking that the response was invalid, we can abort
      mounting the card.
      Reviewed-by: NAvri Altman <avri.altman@wdc.com>
      Signed-off-by: NRaul E Rangel <rrangel@chromium.org>
      Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
      9e4be8d0
  4. 28 2月, 2019 2 次提交
    • H
      mmc: core: Add a debug print when the card may have been replaced · 099b6481
      hongjiefang 提交于
      If the card was removed in suspended state and a new one was inserted,
      print a debug log when the check detects that it's not the old card.
      Signed-off-by: Nhongjiefang <hongjiefang@asrmicro.com>
      Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
      099b6481
    • A
      mmc: core: Add discard support to sd · bc47e2f6
      Avri Altman 提交于
      SD spec v5.1 adds discard support. The flows and commands are similar to
      mmc, so just set the discard arg in CMD38.
      
      A host which supports DISCARD shall check if the DISCARD_SUPPORT (b313)
      is set in the SD_STATUS register.  If the card does not support discard,
      the host shall not issue DISCARD command, but ERASE command instead.
      
      Post the DISCARD operation, the card may de-allocate the discarded
      blocks partially or completely. So the host mustn't make any assumptions
      concerning the content of the discarded region. This is unlike ERASE
      command, in which the region is guaranteed to contain either '0's or
      '1's, depends on the content of DATA_STAT_AFTER_ERASE (b55) in the scr
      register.
      
      One more important difference compared to ERASE is the busy timeout
      which we will address on the next patch.
      Signed-off-by: NAvri Altman <avri.altman@wdc.com>
      Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
      bc47e2f6
  5. 25 2月, 2019 2 次提交
  6. 08 5月, 2018 1 次提交
  7. 02 5月, 2018 1 次提交
  8. 15 3月, 2018 3 次提交
  9. 29 11月, 2017 1 次提交
  10. 30 10月, 2017 2 次提交
    • A
      mmc: sd: Fix signal voltage when there is no power cycle · 6a11fc47
      Adrian Hunter 提交于
      Some boards have SD card connectors where the power rail cannot be switched
      off by the driver. However there are various circumstances when a card
      might be re-initialized, such as after system resume, warm re-boot, or
      error handling. However, a UHS card will continue to use 1.8V signaling
      unless it is power cycled.
      
      If the card has not been power cycled, it may still be using 1.8V
      signaling. According to the SD spec., the Bus Speed Mode (function group 1)
      bits 2 to 4 are zero if the card is initialized at 3.3V signal level. Thus
      they can be used to determine if the card has already switched to 1.8V
      signaling. Detect that situation and try to initialize a UHS-I (1.8V)
      transfer mode.
      
      Tested with the following cards:
        Transcend 4GB High Speed
        Kingston 64GB SDR104
        Lexar by Micron HIGH-PERFORMANCE 300x 16GB DDR50
        SanDisk Ultra 8GB DDR50
        Transcend Ultimate 600x 16GB SDR104
        Transcend Premium 300x 64GB SDR104
        Lexar by Micron Professional 1000x 32GB UHS-II SDR104
        SanDisk Extreme Pro 16GB SDR104
      Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com>
      Tested-by: NZhoujie Wu <zjwu@marvell.com>
      Reviewed-by: NShawn Lin <shawn.lin@rock-chips.com>
      Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
      6a11fc47
    • A
      mmc: core: Introduce host claiming by context · 6c0cedd1
      Adrian Hunter 提交于
      Currently the host can be claimed by a task.  Change this so that the host
      can be claimed by a context that may or may not be a task.  This provides
      for the host to be claimed by a block driver queue to support blk-mq, while
      maintaining compatibility with the existing use of mmc_claim_host().
      Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com>
      Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
      6c0cedd1
  11. 30 8月, 2017 1 次提交
  12. 20 6月, 2017 2 次提交
  13. 25 4月, 2017 1 次提交
  14. 13 2月, 2017 3 次提交
  15. 21 12月, 2016 1 次提交
    • P
      mmc: sd: Meet alignment requirements for raw_ssr DMA · e85baa88
      Paul Burton 提交于
      The mmc_read_ssr() function results in DMA to the raw_ssr member of
      struct mmc_card, which is not guaranteed to be cache line aligned & thus
      might not meet the requirements set out in Documentation/DMA-API.txt:
      
        Warnings:  Memory coherency operates at a granularity called the cache
        line width.  In order for memory mapped by this API to operate
        correctly, the mapped region must begin exactly on a cache line
        boundary and end exactly on one (to prevent two separately mapped
        regions from sharing a single cache line).  Since the cache line size
        may not be known at compile time, the API will not enforce this
        requirement.  Therefore, it is recommended that driver writers who
        don't take special care to determine the cache line size at run time
        only map virtual regions that begin and end on page boundaries (which
        are guaranteed also to be cache line boundaries).
      
      On some systems where DMA is non-coherent this can lead to us losing
      data that shares cache lines with the raw_ssr array.
      
      Fix this by kmalloc'ing a temporary buffer to perform DMA into. kmalloc
      will ensure the buffer is suitably aligned, allowing the DMA to be
      performed without any loss of data.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      Fixes: 5275a652 ("mmc: sd: Export SD Status via “ssr” device attribute")
      Cc: <stable@vger.kernel.org>
      Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
      e85baa88
  16. 05 12月, 2016 1 次提交
  17. 27 9月, 2016 1 次提交
  18. 25 7月, 2016 2 次提交
  19. 17 3月, 2016 1 次提交
  20. 14 1月, 2016 1 次提交
    • C
      mmc: core: Enable tuning according to the actual timing · e10c3219
      Carlo Caione 提交于
      While in sdhci_execute_tuning() the choice whether or not to enable the
      tuning is done on the actual timing, in the mmc_sdio_init_uhs_card() the
      check is done on the capability of the card.
      
      This difference is causing some issues with some SDIO cards in DDR50
      mode where the CDM19 is wrongly issued.
      
      With this patch we modify the check in both
      mmc_(sd|sdio)_init_uhs_card() functions to take the proper decision
      only according to the actual timing specification.
      
      Cc: stable@vger.kernel.org
      Signed-off-by: NCarlo Caione <carlo@endlessm.com>
      Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
      e10c3219
  21. 13 1月, 2016 1 次提交
    • R
      mmc: sd: limit SD card power limit according to cards capabilities · d9812780
      Russell King 提交于
      The SD card specification allows cards to error out a SWITCH command
      where the requested function in a group is not supported.  The spec
      provides for a set of capabilities which indicate which functions are
      supported.
      
      In the case of the power limit, requesting an unsupported power level
      via the SWITCH command fails, resulting in the power level remaining at
      the power-on default of 0.72W, even though the host and card may support
      higher powers levels.
      
      This has been seen with SanDisk 8GB cards, which support the default
      0.72W and 1.44W (200mA and 400mA) in combination with an iMX6 host,
      supporting up to 2.88W (800mA).  This currently causes us to try to set
      a power limit function value of '3' (2.88W) which the card errors out
      on, and thereby causes the power level to remain at 0.72W rather than
      the desired 1.44W.
      
      Arrange to limit the selected current limit by the capabilities reported
      by the card to avoid the SWITCH command failing.  Select the highest
      current limit that the host and card combination support.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      Fixes: a39ca6ae ("mmc: core: Simplify and fix for SD switch processing")
      Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
      d9812780
  22. 28 12月, 2015 1 次提交
  23. 22 12月, 2015 1 次提交
  24. 26 10月, 2015 4 次提交
  25. 04 6月, 2015 1 次提交
  26. 01 6月, 2015 3 次提交