- 11 12月, 2013 1 次提交
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由 Axel Lin 提交于
The time-efm32 driver uses the clocksource MMIO functions. Thus it needs to select CLKSRC_MMIO in Kconfig. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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- 21 11月, 2013 5 次提交
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由 Stephen Boyd 提交于
Pavel Machek reports that this config is exposed on x86 where the ARM architected timers aren't even present. Make it depend on the ARM architected timers being selected so that non-ARM builds aren't asked about it. Reported-by: NPavel Machek <pavel@ucw.cz> Reviewed-by: NPavel Machek <pavel@ucw.cz> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Laurent Pinchart 提交于
Prepare the clock at probe time, as there is no other appropriate place in the driver where we're allowed to sleep. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: linux-kernel@vger.kernel.org Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Laurent Pinchart 提交于
Fix the probe error path to release the clock resource when the sh_tmu_register() call fails. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: linux-kernel@vger.kernel.org Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Laurent Pinchart 提交于
Prepare the clock at probe time, as there is no other appropriate place in the driver where we're allowed to sleep. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: linux-kernel@vger.kernel.org Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Laurent Pinchart 提交于
Fix the probe error path to release the clock resource when the sh_mtu2_register() call fails. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: linux-kernel@vger.kernel.org Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 23 10月, 2013 5 次提交
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由 Maxime Ripard 提交于
IRQF_DISABLED is a no-op nowadays, so we can safely remove it. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Maxime Ripard 提交于
We need to wait for at least 2 clock cycles whenever we reprogram our clockevent timer. Report that the minimum number of ticks we can handle is 3 ticks, and remove 3 ticks to the interval programmed to reflect this. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Maxime Ripard 提交于
The Allwinner SoCs timer use the clocksource MMIO functions. We thus need to select them in Kconfig. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Uwe Kleine-König 提交于
An efm32 features 4 16-bit timers with a 10-bit prescaler. This driver provides clocksource and clock event device using one timer instance each. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Shinya Kuribayashi 提交于
Add calls to clk_prepare and unprepare so that EMMA Mobile EV2 can migrate to the common clock framework. Signed-off-by: NShinya Kuribayashi <shinya.kuribayashi.px@renesas.com> Acked-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 16 10月, 2013 1 次提交
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由 Thierry Reding 提交于
Commit: 65cd4f6c ("arch_timer: Move to generic sched_clock framework") added code to register the arch_sys_counter in arch_timer_register(), but it is already registered in arch_counter_register(). This results in the timer being added to the clocksource list twice, therefore causing an infinite loop in the list. Remove the duplicate registration and register the scheduler clock after the original registration instead. This fixes a hang during boot on Tegra114 (Cortex-A15). [ While I've only tested this on Tegra114, I suspect the same hang during boot happens for all processors that use this clock source. ] Signed-off-by: NThierry Reding <treding@nvidia.com> Acked-by: NJohn Stultz <john.stultz@linaro.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: Will Deacon <will.deacon@arm.com> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: linux-arm-kernel@lists.infradead.org Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Link: http://lkml.kernel.org/r/1381843911-31962-1-git-send-email-treding@nvidia.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
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- 10 10月, 2013 1 次提交
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由 Stephen Boyd 提交于
Register with the generic sched_clock framework now that it supports 64 bits. This fixes two problems with the current sched_clock support for machines using the architected timers. First off, we don't subtract the start value from subsequent sched_clock calls so we can potentially start off with sched_clock returning gigantic numbers. Second, there is no support for suspend/resume handling so problems such as discussed in 6a4dae5e (ARM: 7565/1: sched: stop sched_clock() during suspend, 2012-10-23) can happen without this patch. Finally, it allows us to move the sched_clock setup into drivers clocksource out of the arch ports. Cc: Christopher Covington <cov@codeaurora.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Acked-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NJohn Stultz <john.stultz@linaro.org>
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- 03 10月, 2013 3 次提交
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由 Boris BREZILLON 提交于
Remove the deprecated IRQF_DISABLED flag. Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Boris BREZILLON 提交于
Check function return values to avoid false positive driver init. Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Boris BREZILLON 提交于
Replace clk_enable/disable with clk_prepare_enable/disable_unprepare to avoid common clk framework warnings. Signed-off-by: NBoris BREZILLON <b.brezillon@overkiz.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 02 10月, 2013 4 次提交
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由 Stephen Boyd 提交于
The ARM architected timers keep counting during suspend so we can mark this clocksource with the CLOCK_SOURCE_SUSPEND_NONSTOP flag. This flag will indicate that this clocksource can be used for calculating suspend time and injecting sleep time into the timekeeping core. This should be more accurate than using an external RTC or architecture specific persistent clock. Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Uwe Kleine-König 提交于
These are all only called by dw_apb_timer_init which is an __init function, too Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Uwe Kleine-König 提交于
Instead of letting each driver call of_node_put do it centrally in the loop that also calls the CLOCKSOURCE_OF_DECLARE callbacks. This is less prone to error and also moves getting and putting the references into the same function. Consequently all respective of_node_put calls in drivers are removed. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Acked-by: NDavid Brown <davidb@codeaurora.org>
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由 Soren Brinkmann 提交于
The arm_global_timer is a per cpu device. Set the appropriate flag. Signed-off-by: NSoren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Acked-by: NMichal Simek <michal.simek@xilinx.com> Acked-by: NSrinivas Kandagatla <srinivas.kandagatla@st.com>
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- 26 9月, 2013 6 次提交
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由 Sudeep KarkadaNagesha 提交于
Few control settings done in architected timer as part of initialisation can be lost when CPU enters deeper power states. They need to be restored when the CPU is (warm)reset again. This patch adds CPU PM notifiers to save the counter control register when entering low power modes and restore it when CPU exits low power. Reviewed-by: NCatalin Marinas <catalin.marinas@arm.com> Reviewed-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: NWill Deacon <will.deacon@arm.com> Acked-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NSudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
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由 Will Deacon 提交于
The ARM architected timer can generate events (used for waking up CPUs executing the wfe instruction) at a frequency represented as a power-of-2 divisor of the clock rate. An event stream might be used: - To implement wfe-based timeouts for userspace locking implementations. - To impose a timeout on a wfe for safeguarding against any programming error in case an expected event is not generated. This patch computes the event stream frequency aiming for a period of 100us between events. It uses ARM/ARM64 specific backends to configure and enable the event stream. Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: NCatalin Marinas <catalin.marinas@arm.com> Acked-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NWill Deacon <will.deacon@arm.com> [sudeep: moving ARM/ARM64 changes into separate patches and adding Kconfig option] Signed-off-by: NSudeep KarkadaNagesha <sudeep.karkadanagesha@arm.com>
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由 Magnus Damm 提交于
Update the STI driver by setting cpu_possible_mask to make EMEV2 SMP work as expected together with the ARM broadcast timer. This breakage was introduced by: f7db706b ARM: 7674/1: smp: Avoid dummy clockevent being preferred over real hardware clock-event Without this fix SMP operation is broken on EMEV2 since no broadcast timer interrupts trigger on the secondary CPU cores. Signed-off-by: NMagnus Damm <damm@opensource.se> Tested-by: NSimon Horman <horms+renesas@verge.net.au> Reviewed-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Sebastian Hesselbarth 提交于
Clocksource devices provided by DT can be disabled (status != "okay"). Instead of registering clocksource drivers for disabled nodes, respect the device's status by skiping disabled nodes. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Tomasz Figa 提交于
Some variants of Exynos MCT, namely exynos4210-mct at the moment, use normal, shared interrupts for local timers. This means that each interrupt must have correct affinity set to fire only on CPU corresponding to given local timer. However after recent conversion of clocksource drivers to not use the local timer API for local timer initialization any more, the point of time when local timers get initialized changed and irq_set_affinity() fails because the CPU is not marked as online yet. This patch fixes this by moving the call to irq_set_affinity() to CPU_ONLINE notification, so the affinity is being set when the CPU goes online. This fixes a regression introduced by commit ee98d27d ARM: EXYNOS4: Divorce mct from local timer API which rendered all Exynos4210 based boards unbootable due to failing irq_set_affinity() making local timers inoperatible. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Jean Pihet 提交于
This commit: 573145f0 clocksource: armada-370-xp: Use CLOCKSOURCE_OF_DECLARE replaced a call to the driver's timer initialization by a call to clocksource_of_init(). However, it failed to select CONFIG_CLKSRC_OF. Fix this by selecting CONFIG_CLKSRC_OF for Armada370/XP machines. Without this change the kernel is stuck at: 'Calibrating delay loop...'. Signed-off-by: NJean Pihet <jean.pihet@linaro.org> Acked-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 07 9月, 2013 1 次提交
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由 Tomasz Figa 提交于
When booting with device tree static clkdev aliases should not be used. This patch modifies the samsung_pwm_timer driver to use DT-based clock lookup when booting with device tree. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: NMike Turquette <mturquette@linaro.org>
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- 03 9月, 2013 6 次提交
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由 Ezequiel Garcia 提交于
The Armada XP timer has two mandatory clock inputs: nbclk and refclk, as specified by the device-tree binding. This commit fixes the clock selection. Instead of hard-coding the clock rate for the 25 MHz reference fixed-clock, obtain the clock by its name. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Acked-by: NJason Cooper <jason@lakedaemon.net> Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
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由 Ezequiel Garcia 提交于
If the clock fails to be obtained and the timer fails to be properly registered, the kernel will freeze real soon. Instead, let's BUG() where the actual problem is located. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Acked-by: NJason Cooper <jason@lakedaemon.net> Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
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由 Ezequiel Garcia 提交于
The Armada XP SoC clocksource driver cannot work without the 25 MHz fixed timer. Therefore it's appropriate to introduce a new compatible string and use it to set the 25 MHz fixed timer. The 'marvell,timer-25MHz' property will be marked as deprecated. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
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由 Ezequiel Garcia 提交于
This is almost cosmetic: we achieve a bit of consistency with other clocksource drivers by using the CLOCKSOURCE_OF_DECLARE macro for the boilerplate code. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
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由 Ezequiel Garcia 提交于
This commit creates two functions to access the TIMER_CTRL register: one for global one for the per-cpu. This makes the code much more readable. In addition, since the TIMER_CTRL register is also used for watchdog, this is preparation work for future thread-safe improvements. Acked-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Reviewed-by: NAndrew Lunn <andrew@lunn.ch> Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Ezequiel Garcia 提交于
This is a purely cosmetic commit: we replace hardcoded values that representing bits by BIT(), which is slightly more readable. Signed-off-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
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- 27 8月, 2013 1 次提交
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由 Joe Perches 提交于
Using 0x%# emits 0x0x. Only one is necessary. Signed-off-by: NJoe Perches <joe@perches.com> Acked-by: NTakashi Iwai <tiwai@suse.de> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 22 8月, 2013 3 次提交
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由 Daniel Lezcano 提交于
Add the dynamic irq affinity feature to the timer clock device. Signed-off-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: NVincent Guittot <vincent.guittot@linaro.org> Acked-by: NRickard Andersson <rickard.andersson@stericsson.com>
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由 Magnus Damm 提交于
Add support for CMT hardware with 32-bit control and counter registers, as found on r8a73a4 and r8a7790. To use the CMT with 32-bit hardware a second I/O memory resource needs to point out the CMSTR register and it needs to be 32 bit wide. Signed-off-by: NMagnus Damm <damm@opensource.se> Reviewed-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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由 Laurent Pinchart 提交于
Replace kzalloc, clk_get, ioremap and request_irq by their managed counterparts to simplify error paths. Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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- 21 8月, 2013 1 次提交
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由 Christian Daudt 提交于
[ this is a follow-up to this discussion: http://archive.arm.linux.org.uk/lurker/message/20130730.230827.a1ceb12a.en.html ] This patchset renames all uses of "bcm," name bindings to "brcm," as they were done prior to knowing that brcm had already been standardized as Broadcom vendor prefix (in Documentation/devicetree/bindings/vendor-prefixes.txt). This will not cause any churn on devices because none of these bindings have made it into production yet. Signed-off-by: NChristian Daudt <csd@broadcom.com> Acked-by: NStephen Warren <swarren@nvidia.com>
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- 06 8月, 2013 2 次提交
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由 Tomasz Figa 提交于
Current suspend/resume handling of the driver was broken, because: - periodic timer was being enabled in CLOCK_EVT_MODE_RESUME mode, which does not seem to be correct behavior looking at other platforms, - PWM divisors need to be restored, but they were not, - clockevent interrupt mask needs to be restored, but it was not, - clocksource was being restored in clockevent resume callback. This patch fixes issues mentioned above, making suspend/resume handling in the driver correct. Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com> Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Tested-by: NHeiko Stuebner <heiko@sntech.de> Tested-by: NMark Brown <broonie@linaro.org> Tested-by: NSylwester Nawrocki <sylvester.nawrocki@gmail.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NDaniel Lezcano <daniel.lezcano@linaro.org>
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由 Tomasz Figa 提交于
In case of Samsung PWM timer, clocksource MMIO can not be used, because custom suspend/resume callbacks are required. Signed-off-by: NTomasz Figa <tomasz.figa@gmail.com> Reviewed-by: NDaniel Lezcano <daniel.lezcano@linaro.org> Reviewed-by: NSylwester Nawrocki <s.nawrocki@samsung.com> Tested-by: NHeiko Stuebner <heiko@sntech.de> Tested-by: NMark Brown <broonie@linaro.org> Tested-by: NSylwester Nawrocki <sylvester.nawrocki@gmail.com> Acked-by: NArnd Bergmann <arnd@arndb.de>
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