- 30 9月, 2015 2 次提交
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由 Furquan Shaikh 提交于
This patch fixes timeout issues seen on large NOR flash (e.g., 16MB w25q128fw) when using ioctl(MEMERASE) with offset=0 and length=16M. The input parameters matter because spi_nor_erase() uses a different code path for full-chip erase, where we use the SPINOR_OP_CHIP_ERASE (0xc7) opcode. Fix: use a different timeout for full-chip erase than for other commands. While most operations can be expected to perform relatively similarly across a variety of NOR flash types and sizes (and therefore might as well use a similar timeout to keep things simple), full-chip erase is unique, because the time it typically takes to complete: (1) is much larger than most operations and (2) scales with the size of the flash. Let's base our timeout on the original comments stuck here -- that a 2MB flash requires max 40s to erase. Small survey of a few flash datasheets I have lying around: Chip Size (MB) Max chip erase (seconds) ---- -------- ------------------------ w25q32fw 4 50 w25q64cv 8 30 w25q64fw 8 100 w25q128fw 16 200 s25fl128s 16 ~256 s25fl256s 32 ~512 From this data, it seems plenty sufficient to say we need to wait for 40 seconds for each 2MB of flash. After this change, it might make some sense to decrease the timeout for everything else, as even the most extreme operations (single block erase?) shouldn't take more than a handful of seconds. But for safety, let's leave it as-is. It's only an error case, after all, so we don't exactly need to optimize it. Signed-off-by: NFurquan Shaikh <furquan@google.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Yao Yuan 提交于
It is a 512KiB flash with 4 KiB erase sectors. Signed-off-by: NYuan Yao <yao.yuan@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 29 9月, 2015 1 次提交
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由 Joachim Eastwood 提交于
s25fl016k can be found on Embedded Artists' LPC4357 Developer's Kit where is used in quad mode by the LPC4357 SPIFI controller. Signed-off-by: NJoachim Eastwood <manabian@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 12 9月, 2015 3 次提交
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由 Jagan Teki 提交于
The 'write_enable' argument is unused and unneeded, so remove it from the API. Signed-off-by: NJagan Teki <jteki@openedev.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Han Xu <han.xu@freescale.com> [Brian: fixed for nxp-spifi.c] Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Jagan Teki 提交于
Use existing write_sr() call instead of decoding and calling nor->write_reg separately. Signed-off-by: NJagan Teki <jteki@openedev.com> Cc: David Woodhouse <dwmw2@infradead.org> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Marek Vasut 提交于
The problem this patch is trying to address is such, that SPI NOR flash devices attached to a dedicated SPI NOR controller cannot read their properties from the associated struct device_node. A couple of facts first: 1) Each SPI NOR flash has a struct spi_nor associated with it. 2) Each SPI NOR flash has certain device properties associated with it, for example the OF property 'm25p,fast-read' is a good pick. These properties are used by the SPI NOR core to select which opcodes are sent to such SPI NOR flash. These properties are coming from spi_nor .dev->of_node . The problem is, that for SPI NOR controllers, the struct spi_nor .dev element points to the struct device of the SPI NOR controller, not the SPI NOR flash. Therefore, the associated dev->of_node also is the one of the controller and therefore the SPI NOR core code is trying to parse the SPI NOR controller's properties, not the properties of the SPI NOR flash. Note: The m25p80 driver is not affected, because the controller and the flash are the same device, so the associated device_node of the controller and the flash are the same. This patch adjusts the SPI NOR core such that the device_node is not picked from spi_nor .dev directly, but from a new separate spi_nor .flash_node element. This let's the SPI NOR controller drivers set up a different spi_nor .flash_node element for each SPI NOR flash. This patch also fixes the controller drivers to be compatible with this modification and correctly set the spi_nor .flash_node element. This patch is inspired by 5844feea mtd: nand: add common DT init code Signed-off-by: NMarek Vasut <marex@denx.de> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 03 9月, 2015 8 次提交
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由 Brian Norris 提交于
Commit 06bb6f5a ("mtd: spi-nor: stop (ab)using struct spi_device_id") converted an array into a pointer, which means that we should be checking if the pointer goes anywhere, not whether the C string is empty. To do the latter means we dereference a NULL pointer when we reach the terminating entry, for which 'name' is now NULL instead of an array { 0, 0, ... }. Sample crash: [ 1.101371] Unable to handle kernel NULL pointer dereference at virtual address 00000000 [ 1.109457] pgd = c0004000 [ 1.112157] [00000000] *pgd=00000000 [ 1.115736] Internal error: Oops: 5 [#1] SMP ARM [ 1.120345] Modules linked in: [ 1.123405] CPU: 3 PID: 1 Comm: swapper/0 Not tainted 4.2.0-next-20150902+ #61 [ 1.130611] Hardware name: Rockchip (Device Tree) [ 1.135306] task: ee0b8d40 ti: ee0ba000 task.ti: ee0ba000 [ 1.140697] PC is at spi_nor_scan+0x90/0x8c4 [ 1.144958] LR is at spi_nor_scan+0xa4/0x8c4 ... [ 1.504112] [<c03cc2e0>] (spi_nor_scan) from [<c03cb188>] (m25p_probe+0xc8/0x11c) [ 1.511583] [<c03cb188>] (m25p_probe) from [<c03cd9d8>] (spi_drv_probe+0x60/0x7c) [ 1.519055] [<c03cd9d8>] (spi_drv_probe) from [<c037faa0>] (driver_probe_device+0x1a0/0x444) [ 1.527478] [<c037faa0>] (driver_probe_device) from [<c037fec8>] (__device_attach_driver+0x94/0xa0) [ 1.536507] [<c037fec8>] (__device_attach_driver) from [<c037db3c>] (bus_for_each_drv+0x94/0xa4) [ 1.545277] [<c037db3c>] (bus_for_each_drv) from [<c037f7e4>] (__device_attach+0xa4/0x144) [ 1.553526] [<c037f7e4>] (__device_attach) from [<c0380058>] (device_initial_probe+0x1c/0x20) [ 1.562035] [<c0380058>] (device_initial_probe) from [<c037ec88>] (bus_probe_device+0x38/0x94) [ 1.570631] [<c037ec88>] (bus_probe_device) from [<c037ccf4>] (device_add+0x430/0x558) [ 1.578534] [<c037ccf4>] (device_add) from [<c03d0240>] (spi_add_device+0xe4/0x174) [ 1.586178] [<c03d0240>] (spi_add_device) from [<c03d0a24>] (spi_register_master+0x698/0x7d4) [ 1.594688] [<c03d0a24>] (spi_register_master) from [<c03d0ba0>] (devm_spi_register_master+0x40/0x7c) [ 1.603892] [<c03d0ba0>] (devm_spi_register_master) from [<c03d2fb4>] (rockchip_spi_probe+0x360/0x3f4) [ 1.613182] [<c03d2fb4>] (rockchip_spi_probe) from [<c0381e34>] (platform_drv_probe+0x58/0xa8) [ 1.621779] [<c0381e34>] (platform_drv_probe) from [<c037faa0>] (driver_probe_device+0x1a0/0x444) [ 1.630635] [<c037faa0>] (driver_probe_device) from [<c037fdc4>] (__driver_attach+0x80/0xa4) [ 1.639058] [<c037fdc4>] (__driver_attach) from [<c037e850>] (bus_for_each_dev+0x98/0xac) [ 1.647221] [<c037e850>] (bus_for_each_dev) from [<c037f448>] (driver_attach+0x28/0x30) [ 1.655210] [<c037f448>] (driver_attach) from [<c037ef74>] (bus_add_driver+0x128/0x250) [ 1.663200] [<c037ef74>] (bus_add_driver) from [<c0380c40>] (driver_register+0xac/0xf0) [ 1.671191] [<c0380c40>] (driver_register) from [<c0381d50>] (__platform_driver_register+0x58/0x6c) [ 1.680221] [<c0381d50>] (__platform_driver_register) from [<c0a467c8>] (rockchip_spi_driver_init+0x18/0x20) [ 1.690033] [<c0a467c8>] (rockchip_spi_driver_init) from [<c00098a4>] (do_one_initcall+0x124/0x1dc) [ 1.699063] [<c00098a4>] (do_one_initcall) from [<c0a19f84>] (kernel_init_freeable+0x218/0x2ec) [ 1.707748] [<c0a19f84>] (kernel_init_freeable) from [<c0719ed8>] (kernel_init+0x1c/0xf4) [ 1.715912] [<c0719ed8>] (kernel_init) from [<c000fe50>] (ret_from_fork+0x14/0x24) [ 1.723460] Code: e3510000 159f67c0 0a00000c e5961000 (e5d13000) [ 1.729564] ---[ end trace 95baa6b3b861ce25 ]--- Fixes: 06bb6f5a ("mtd: spi-nor: stop (ab)using struct spi_device_id") Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Cc: Rafał Miłecki <zajec5@gmail.com>
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由 Brian Norris 提交于
We don't really need the flash information from the device tree here. Let's stick with autodetection here instead. Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Acked-by: NHan Xu <han.xu@freescale.com> Tested-by: NHan Xu <han.xu@freescale.com>
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由 Brian Norris 提交于
This reflects the proper layering, so let's do it. Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Tested-by: NJoachim Eastwood <manabian@gmail.com>
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由 Brian Norris 提交于
Layering suggests that the SPI NOR layer (not the hardware driver) should be initializing the MTD layer. Signed-off-by: NBrian Norris <computersforpeace@gmail.com> Tested-by: NJoachim Eastwood <manabian@gmail.com>
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由 Joachim Eastwood 提交于
This chip can be found on Hitex LPC4350 Evaluation Board. Signed-off-by: NJoachim Eastwood <manabian@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Jonas Gorski 提交于
According to the datasheet[1], both S25FL129P0 (256kB sectors) and S25FL129P1 (64kB sectors) support dual read, quad read, dual i/o read and quad i/o read. I have verified dual read to be working for S25FL129P1 on a dual capable spi controller. Quad as well as S25FL129P0 is untested, lacking hardware to verify. [1] http://www.spansion.com/Support/Datasheets/S25FL129P_00.pdfSigned-off-by: NJonas Gorski <jogo@openwrt.org> Reviewed-by: NMarek Vasut <marex@denx.de> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Alexis Ballier 提交于
It is a 256KiB flash with 4 KiB erase sectors and 64KiB overlay blocks. This is the one available on Hardkernel's Odroid U3 shield. Signed-off-by: NAlexis Ballier <aballier@gentoo.org> [Brian: seems like this does NOT require the usual SST_WRITE hacks] Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Mika Westerberg 提交于
Add Micron (n25q064a) 8MB flash to the list of supported chips. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: NJagan Teki <jteki@openedev.com> [Brian: fixup context] Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 26 8月, 2015 1 次提交
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由 Rafał Miłecki 提交于
Using struct spi_device_id for storing list of flash devices comes from early SPI NOR framework days. Thanks to the commit 70f3ce05 ("mtd: spi-nor: make spi_nor_scan() take a chip type name, not spi_device_id") we can stop using spi_device_id and just switch to our own struct. Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 15 8月, 2015 3 次提交
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由 Antony Pavlov 提交于
Spansion S25FL204K is a 4-Mbit 3.0V Serial Flash Memory with Uniform 4 kB Sectors. Signed-off-by: NAntony Pavlov <antonynpavlov@gmail.com> Acked-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Fabio Estevam 提交于
The current "We only connect the NOR to this controller now." text is not very clear, so explain it better by saying that generic SPI is not supported by SPI_FSL_QUADSPI and only SPI NOR is. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Joachim Eastwood 提交于
Add SPI-NOR driver for the SPI Flash Interface (SPIFI) controller that is found on newer NXP MCU devices. The controller supports serial SPI Flash devices with 1-, 2- and 4-bit width in either SPI mode 0 or 3. The controller can operate in either command or memory mode. In memory mode the Flash is exposed as normal memory and can be directly accessed by the CPU. Signed-off-by: NJoachim Eastwood <manabian@gmail.com> Reviewed-by: NEzequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 07 8月, 2015 8 次提交
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由 Frank Li 提交于
Erase function will use cmd 0x20 (SPINOR_OP_BE_4K) if kenrel enable option CONFIG_MTD_SPI_NOR_USE_4K_SECTORS. This command is not in fsl-quadspi driver LUT. So driver continue report fsl-quadspi 21e0000.qspi: Unsupported cmd 0x20. This patch fix this issue. Signed-off-by: NFrank Li <Frank.Li@freescale.com> Acked-by: NHan Xu <Han.xu@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Frank Li 提交于
The uboot may run the QuadSpi controler with command: #sf probe So we should reset the module in the probe. This patch also clear the pending interrupts which arised by the uboot code. Signed-off-by: NHuang Shijie <shijie8@gmail.com> Signed-off-by: NFrank Li <Frank.Li@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Frank Li 提交于
QSPI1 cannot wake up CCM from WAIT mode on SX ARD board, add pmqos to let PM NOT enter WAIT mode when accessing QSPI1, refer to TKT245618. Signed-off-by: NFrank Li <Frank.Li@freescale.com> Signed-off-by: NHan Xu <Han.xu@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Allen Xu 提交于
We found there is a low probability(5%) QSPI access timeout issue, usually it happened on kernel boot stage, the first time kernel tried to access QSPI chip. The READ_ID command was sent but not executed, consequently the probe function failed. The root cause is that the divider is not glitchless in i.MX6SX chip. If qspi clock enabled then change clock frequency by call clk_set_rate, there will be glitch at low possiblity rate and pass to qspi controller. The controler will be hang by this glitch. Based on the new clock flag(CLK_SET_RATE_GATE) and new framework, we need to change the approach of seting clock rate. 1. Disable clock. 2. call clk_set_rate. 3. Enable clock again. Signed-off-by: NHan Xu <han.xu@freescale.com> Signed-off-by: NFrank Li <Frank.Li@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Frank Li 提交于
Add i.mx6ul chip support Signed-off-by: NFrank Li <Frank.Li@freescale.com> Acked-by: NHan xu <han.xu@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Frank Li 提交于
Support i.mx7d. quadspi in i.mx7d increase rxfifo. require fill at least 16byte to trigger data transfer. Signed-off-by: NFrank Li <Frank.Li@freescale.com> Signed-off-by: NHan Xu <han.xu@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Han Xu 提交于
add several quirk to distinguish different version of qspi module. Signed-off-by: NHan Xu <han.xu@freescale.com> Signed-off-by: NFrank Li <Frank.Li@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Han Xu 提交于
QSPI may failed to map enough memory (256MB) for AHB read in previous implementation, especially in 3G/1G memory layout kernel. Dynamically map memory to avoid such issue. This implementation generally map QUADSPI_MAX_IOMAP (default 4MB) memory for AHB read, it should be enough for common scenarios, and the side effect (0.6% performance drop) is minor. Previous implementation root@imx6qdlsolo:~# dd if=/dev/mtd0 of=/dev/null bs=1K count=32K 32768+0 records in 32768+0 records out 33554432 bytes (34 MB) copied, 2.16006 s, 15.5 MB/s root@imx6qdlsolo:~# dd if=/dev/mtd0 of=/dev/null bs=32M count=1 1+0 records in 1+0 records out 33554432 bytes (34 MB) copied, 1.43149 s, 23.4 MB/s After applied the patch root@imx6qdlsolo:~# dd if=/dev/mtd0 of=/dev/null bs=1K count=32K 32768+0 records in 32768+0 records out 33554432 bytes (34 MB) copied, 2.1743 s, 15.4 MB/s root@imx6qdlsolo:~# dd if=/dev/mtd0 of=/dev/null bs=32M count=1 1+0 records in 1+0 records out 33554432 bytes (34 MB) copied, 1.43158 s, 23.4 MB/s Signed-off-by: NHan Xu <han.xu@freescale.com> Signed-off-by: NFrank Li <Frank.Li@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 22 7月, 2015 1 次提交
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由 Brian Norris 提交于
When we added the "jedec,spi-nor" compatible string for use in this driver, we added it as a modalias option. The modalias can be derived in different ways for platform devices vs. device tree (of_*) matching. But for device tree matching (the primary target of this identifier string), the modalias is determined from the first entry in the 'compatible' property. IOW, the following properties would bind to this driver: // Option (a), modalias = "spi-nor" compatible = "jedec,spi-nor"; // Option (b), modalias = "spi-nor" compatible = "idontknowwhatimdoing,spi-nor"; But the following would not: // Option (c), modalias = "shinynewdevice" compatible = "myvendor,shinynewdevice", "jedec,spi-nor"; So, we'd like to match (a) and (c) (even when we don't have an explicit entry for "shinynewdevice"), and we'd rather not allow (b). To do this, we (1) always (for devices without specific platform data) pass the modalias to the spi-nor library; (2) rework the spi-nor library to not reject "bad" names, and instead just fall back to autodetection; and (3) add the .of_match_table to properly catch all "jedec,spi-nor". This allows (a) and (c) without warnings, and rejects (b). Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 21 7月, 2015 2 次提交
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由 Alexey Firago 提交于
Micron n25q064 flash supports 4 KiB erase sectors. Signed-off-by: NAlexey Firago <alexey_firago@mentor.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Alexander Stein 提交于
QUADSPI_MCR_CLR_TXF_MASK is the correct mask for clearing the TX FIFO. Signed-off-by: NAlexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 24 6月, 2015 1 次提交
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由 Han Xu 提交于
Add supports for simultaneous access to multiple chips. Need to lock the mutex before any quad spi operations and unlock the mutex after operations complete. Signed-off-by: NHan Xu <b45815@freescale.com> [Brian: reworked err path in fsl_qspi_prep()] Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 21 5月, 2015 2 次提交
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由 Rafał Miłecki 提交于
Few recently added entries are missing SECT_4K flag despite of these flashes supporting 4 KiB erase sectors and 0x20 erase command. Also add a comment to help avoiding such mistakes in the future. Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Cc: Knut Wohlrab <knut.wohlrab@de.bosch.com> Cc: Huang Shijie <shijie.huang@intel.com> Cc: Shengzhou Liu <shengzhou.liu@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Rafał Miłecki 提交于
It's an 8 MiB flash with 4 KiB erase sectors. Signed-off-by: NRafał Miłecki <zajec5@gmail.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 07 5月, 2015 3 次提交
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由 Gabor Juhos 提交于
Signed-off-by: NGabor Juhos <juhosg@openwrt.org> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Gabor Juhos 提交于
Signed-off-by: NGabor Juhos <juhosg@openwrt.org> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Fabian Frederick 提交于
of_device_id is always used as const. (See driver.of_match_table and open firmware functions) Signed-off-by: NFabian Frederick <fabf@skynet.be> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 06 4月, 2015 4 次提交
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由 Mika Westerberg 提交于
Add Macronix (mx25u6435f) 8MB flash to the list of supported chips. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Mika Westerberg 提交于
Add Winbond (w25q64dw) 8MB flash to the list of supported chips. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Gabor Juhos 提交于
Signed-off-by: NGabor Juhos <juhosg@openwrt.org> Signed-off-by: NLuka Perkov <luka@openwrt.org> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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由 Shengzhou Liu 提交于
Add support for EON en25s64 SPI flash. Signed-off-by: NShengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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- 31 3月, 2015 1 次提交
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由 Nicholas Mc Guire 提交于
return type of wait_for_completion_timeout is unsigned long not int, this patch uses the return value of wait_for_completion_timeout in the condition directly rather than adding a additional appropriately typed variable. Signed-off-by: NNicholas Mc Guire <hofrat@osadl.org> Acked-by: NHan Xu <han.xu@freescale.com> Signed-off-by: NBrian Norris <computersforpeace@gmail.com>
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