1. 08 11月, 2014 6 次提交
  2. 07 11月, 2014 23 次提交
  3. 03 11月, 2014 11 次提交
    • T
      kvm: kvmclock: use get_cpu() and put_cpu() · c6338ce4
      Tiejun Chen 提交于
      We can use get_cpu() and put_cpu() to replace
      preempt_disable()/cpu = smp_processor_id() and
      preempt_enable() for slightly better code.
      Signed-off-by: NTiejun Chen <tiejun.chen@intel.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      c6338ce4
    • R
      KVM: x86: optimize some accesses to LVTT and SPIV · f30ebc31
      Radim Krčmář 提交于
      We mirror a subset of these registers in separate variables.
      Using them directly should be faster.
      Signed-off-by: NRadim Krčmář <rkrcmar@redhat.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      f30ebc31
    • R
      KVM: x86: detect LVTT changes under APICv · a323b409
      Radim Krčmář 提交于
      APIC-write VM exits are "trap-like": they save CS:RIP values for the
      instruction after the write, and more importantly, the handler will
      already see the new value in the virtual-APIC page.  This means that
      apic_reg_write cannot use kvm_apic_get_reg to omit timer cancelation
      when mode changes.
      
      timer_mode_mask shouldn't be changing as it depends on cpuid.
      Signed-off-by: NRadim Krčmář <rkrcmar@redhat.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      a323b409
    • R
      KVM: x86: detect SPIV changes under APICv · e462755c
      Radim Krčmář 提交于
      APIC-write VM exits are "trap-like": they save CS:RIP values for the
      instruction after the write, and more importantly, the handler will
      already see the new value in the virtual-APIC page.
      
      This caused a bug if you used KVM_SET_IRQCHIP to set the SW-enabled bit
      in the SPIV register.  The chain of events is as follows:
      
      * When the irqchip is added to the destination VM, the apic_sw_disabled
      static key is incremented (1)
      
      * When the KVM_SET_IRQCHIP ioctl is invoked, it is decremented (0)
      
      * When the guest disables the bit in the SPIV register, e.g. as part of
      shutdown, apic_set_spiv does not notice the change and the static key is
      _not_ incremented.
      
      * When the guest is destroyed, the static key is decremented (-1),
      resulting in this trace:
      
        WARNING: at kernel/jump_label.c:81 __static_key_slow_dec+0xa6/0xb0()
        jump label: negative count!
      
        [<ffffffff816bf898>] dump_stack+0x19/0x1b
        [<ffffffff8107c6f1>] warn_slowpath_common+0x61/0x80
        [<ffffffff8107c76c>] warn_slowpath_fmt+0x5c/0x80
        [<ffffffff811931e6>] __static_key_slow_dec+0xa6/0xb0
        [<ffffffff81193226>] static_key_slow_dec_deferred+0x16/0x20
        [<ffffffffa0637698>] kvm_free_lapic+0x88/0xa0 [kvm]
        [<ffffffffa061c63e>] kvm_arch_vcpu_uninit+0x2e/0xe0 [kvm]
        [<ffffffffa05ff301>] kvm_vcpu_uninit+0x21/0x40 [kvm]
        [<ffffffffa067cec7>] vmx_free_vcpu+0x47/0x70 [kvm_intel]
        [<ffffffffa061bc50>] kvm_arch_vcpu_free+0x50/0x60 [kvm]
        [<ffffffffa061ca22>] kvm_arch_destroy_vm+0x102/0x260 [kvm]
        [<ffffffff810b68fd>] ? synchronize_srcu+0x1d/0x20
        [<ffffffffa06030d1>] kvm_put_kvm+0xe1/0x1c0 [kvm]
        [<ffffffffa06036f8>] kvm_vcpu_release+0x18/0x20 [kvm]
        [<ffffffff81215c62>] __fput+0x102/0x310
        [<ffffffff81215f4e>] ____fput+0xe/0x10
        [<ffffffff810ab664>] task_work_run+0xb4/0xe0
        [<ffffffff81083944>] do_exit+0x304/0xc60
        [<ffffffff816c8dfc>] ? _raw_spin_unlock_irq+0x2c/0x50
        [<ffffffff810fd22d>] ?  trace_hardirqs_on_caller+0xfd/0x1c0
        [<ffffffff8108432c>] do_group_exit+0x4c/0xc0
        [<ffffffff810843b4>] SyS_exit_group+0x14/0x20
        [<ffffffff816d33a9>] system_call_fastpath+0x16/0x1b
      Signed-off-by: NRadim Krčmář <rkrcmar@redhat.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      e462755c
    • D
      KVM: trivial fix comment regarding __kvm_set_memory_region · 02d5d55b
      Dominik Dingel 提交于
      commit 72dc67a6 ("KVM: remove the usage of the mmap_sem for the protection of the memory slots.")
      changed the lock which will be taken. This should be reflected in the function
      commentary.
      Signed-off-by: NDominik Dingel <dingel@linux.vnet.ibm.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      02d5d55b
    • C
      KVM: x86: Enable Intel AVX-512 for guest · 612263b3
      Chao Peng 提交于
      Expose Intel AVX-512 feature bits to guest. Also add checks for
      xcr0 AVX512 related bits according to spec:
      http://download-software.intel.com/sites/default/files/managed/71/2e/319433-017.pdfSigned-off-by: NChao Peng <chao.p.peng@linux.intel.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      612263b3
    • M
      kvm: drop unsupported capabilities, fix documentation · 7f05db6a
      Michael S. Tsirkin 提交于
      No kernel ever reported KVM_CAP_DEVICE_MSIX, KVM_CAP_DEVICE_MSI,
      KVM_CAP_DEVICE_ASSIGNMENT, KVM_CAP_DEVICE_DEASSIGNMENT.
      
      This makes the documentation wrong, and no application ever
      written to use these capabilities has a chance to work correctly.
      The only way to detect support is to try, and test errno for ENOTTY.
      That's unfortunate, but we can't fix the past.
      
      Document the actual semantics, and drop the definitions from
      the exported header to make it easier for application
      developers to note and fix the bug.
      Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      7f05db6a
    • R
      KVM: x86: fix deadline tsc interrupt injection · 1e0ad70c
      Radim Krčmář 提交于
      The check in kvm_set_lapic_tscdeadline_msr() was trying to prevent a
      situation where we lose a pending deadline timer in a MSR write.
      Losing it is fine, because it effectively occurs before the timer fired,
      so we should be able to cancel or postpone it.
      
      Another problem comes from interaction with QEMU, or other userspace
      that can set deadline MSR without a good reason, when timer is already
      pending:  one guest's deadline request results in more than one
      interrupt because one is injected immediately on MSR write from
      userspace and one through hrtimer later.
      
      The solution is to remove the injection when replacing a pending timer
      and to improve the usual QEMU path, we inject without a hrtimer when the
      deadline has already passed.
      Signed-off-by: NRadim Krčmář <rkrcmar@redhat.com>
      Reported-by: NNadav Amit <namit@cs.technion.ac.il>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      1e0ad70c
    • R
      KVM: x86: add apic_timer_expired() · 5d87db71
      Radim Krčmář 提交于
      Make the code reusable.
      
      If the timer was already pending, we shouldn't be waiting in a queue,
      so wake_up can be skipped, simplifying the path.
      
      There is no 'reinject' case => the comment is removed.
      Current race behaves correctly.
      Signed-off-by: NRadim Krčmář <rkrcmar@redhat.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      5d87db71
    • T
      Documentation: virtual: kvm: correct one bit description in APF case · 91690bf3
      Tiejun Chen 提交于
      When commit 6adba527 (KVM: Let host know whether the guest can
      handle async PF in non-userspace context.) is introduced, actually
      bit 2 still is reserved and should be zero. Instead, bit 1 is 1 to
      indicate if asynchronous page faults can be injected when vcpu is
      in cpl == 0, and also please see this,
      
      in the file kvm_para.h, #define KVM_ASYNC_PF_SEND_ALWAYS (1 << 1).
      Signed-off-by: NTiejun Chen <tiejun.chen@intel.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      91690bf3
    • N
      KVM: vmx: Unavailable DR4/5 is checked before CPL · 16f8a6f9
      Nadav Amit 提交于
      If DR4/5 is accessed when it is unavailable (since CR4.DE is set), then #UD
      should be generated even if CPL>0. This is according to Intel SDM Table 6-2:
      "Priority Among Simultaneous Exceptions and Interrupts".
      
      Note, that this may happen on the first DR access, even if the host does not
      sets debug breakpoints. Obviously, it occurs when the host debugs the guest.
      
      This patch moves the DR4/5 checks from __kvm_set_dr/_kvm_get_dr to handle_dr.
      The emulator already checks DR4/5 availability in check_dr_read. Nested
      virutalization related calls to kvm_set_dr/kvm_get_dr would not like to inject
      exceptions to the guest.
      
      As for SVM, the patch follows the previous logic as much as possible. Anyhow,
      it appears the DR interception code might be buggy - even if the DR access
      may cause an exception, the instruction is skipped.
      Signed-off-by: NNadav Amit <namit@cs.technion.ac.il>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      16f8a6f9