1. 24 11月, 2014 5 次提交
    • M
      MIPS: iomap: Use __mem_{read,write}{b,w,l} for MMIO · 0845bb72
      Markos Chandras 提交于
      Using the __raw_{read,write}{b,w,l} functions to perform
      repeatable MMIO could result in problems if the host bus
      does not match the endianness of the PCI/ISA. This problem
      is visible on big-endian SEAD3 configurations after commit
      2925f6c0
      "net: smc911x: use io{read,write}*_rep accessors". This effectively
      moves away from using the __mem_* variants to __raw_* ones
      and causes a kernel bug as follows:
      
      Call Trace:
      CPU 0 Unable to handle kernel paging request at virtual address 00000000,
      epc == 00000000, ra == 8012b3b0
      Oops[#1]:
      Cpu 0
      $ 0   : 00000000 00000065 00000000 00000004
      $ 4   : 00000000 00000000 9a82dd60 00000000
      $ 8   : 00000000 00000000 a00ae278 00000007
      $12   : 0000000e 00000011 804c4228 ffff9411
      $16   : 00000100 00000000 80560000 807fc6d0
      $20   : 807fc8d0 807fcad0 807fbec0 00000100
      $24   : 00009150 80109be0
      $28   : 9a82c000 9a82dd28 00000001 8012b3b0
      Hi    : 00000000
      Lo    : 00000000
      epc   : 00000000   (null)
          Not tainted
      ra    : 8012b3b0 call_timer_fn.isra.39+0x24/0x84
      Status: 10009503    KERNEL EXL IE
      Cause : 00800808
      BadVA : 00000000
      PrId  : 00019c20 (MIPS M14Kc)
      Modules linked in:
      Process swapper (pid: 1, threadinfo=9a82c000, task=9a82ba18, tls=00000000)
      Stack : 00000040 00000000 00000007 8056732c 80580000 00000001 9a82dd60 00200200
              80560000 8012b598 8056732c 80580000 00000001 00000000 9a82dd60 9a82dd60
              00000000 807fbd44 807fbd40 805664e0 0000000a 80800000 00000004 80125924
              0000fda0 000007f0 80000000 00000001 80800000 007f0000 00200140 80166338
              00000000 8100fda0 0000fda0 000007f0 80000000 00000001 80800000 007f0000
              ...
      Call Trace:
      [<8012b598>] run_timer_softirq+0x188/0x1f4
      [<80125924>] __do_softirq+0xc4/0x18c
      [<80166338>] handle_percpu_irq+0x54/0x84
      [<80125aa4>] do_softirq+0x68/0x70
      [<80103b50>] do_IRQ+0x18/0x28
      [<80125d1c>] irq_exit+0x94/0xc0
      [<80125aa4>] do_softirq+0x68/0x70
      [<80102130>] ret_from_irq+0x0/0x4
      [<80102130>] ret_from_irq+0x0/0x4
      [<80125d1c>] irq_exit+0x94/0xc0
      [<803165b0>] __bzero+0xd4/0x164
      [<80346d0c>] mem32_serial_out+0x0/0x1c
      [<8010d4ac>] free_init_pages+0x98/0xfc
      [<80180a08>] free_hot_cold_page+0x2c/0x1c4
      [<80180bd8>] __free_pages+0x38/0x98
      [<8010d4a0>] free_init_pages+0x8c/0xfc
      [<8010d4ac>] free_init_pages+0x98/0xfc
      [<8049fb04>] kernel_init+0x28/0x15c
      [<80147484>] schedule_tail+0x1c/0x60
      [<8049fadc>] kernel_init+0x0/0x15c
      [<80102178>] ret_from_kernel_thread+0x14/0x1c
      [<8040a06f>] skb_pad+0xe7/0x13c
      Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com>
      Cc: Steve Glendinning <steve.glendinning@shawell.net>
      Cc: Ben Boeckel <mathstuf@gmail.com>
      Cc: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
      Cc: David S. Miller <davem@davemloft.net>
      Cc: netdev@vger.kernel.org
      Cc: Jeffrey Deans <Jeffrey.Deans@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/6672/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      0845bb72
    • M
      MIPS: lib: mips-atomic.c: Remove obsolete ifdefery · f4f7d86b
      Markos Chandras 提交于
      Having #ifdefs just to guard comments is not really helpful
      so drop them. Moreover, the code wasn't really reached anyway
      since there is a #ifndef CONFIG_CPU_MIPSR2 on the top of the file.
      Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/8513/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      f4f7d86b
    • I
      MIPS: R3000: Remove redundant parentheses · 432d9ecb
      Isamu Mogi 提交于
      Signed-off-by: NIsamu Mogi <isamu@leafytree.jp>
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/8292/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      432d9ecb
    • I
      MIPS: R3000: Replace magic numbers with macros · 80e8bd26
      Isamu Mogi 提交于
      Also include asm/mmu_context.h for ASID_MASK.
      Signed-off-by: NIsamu Mogi <isamu@leafytree.jp>
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/8291/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      80e8bd26
    • R
      MIPS: Remove __strlen_user(). · 4ff3fccd
      Ralf Baechle 提交于
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      4ff3fccd
  2. 20 11月, 2014 1 次提交
  3. 06 11月, 2014 1 次提交
  4. 04 11月, 2014 1 次提交
  5. 22 9月, 2014 1 次提交
  6. 31 5月, 2014 1 次提交
  7. 24 5月, 2014 1 次提交
    • R
      MIPS: MT: Remove SMTC support · b633648c
      Ralf Baechle 提交于
      Nobody is maintaining SMTC anymore and there also seems to be no userbase.
      Which is a pity - the SMTC technology primarily developed by Kevin D.
      Kissell <kevink@paralogos.com> is an ingenious demonstration for the MT
      ASE's power and elegance.
      
      Based on Markos Chandras <Markos.Chandras@imgtec.com> patch
      https://patchwork.linux-mips.org/patch/6719/ which while very similar did
      no longer apply cleanly when I tried to merge it plus some additional
      post-SMTC cleanup - SMTC was a feature as tricky to remove as it was to
      merge once upon a time.
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      b633648c
  8. 13 5月, 2014 3 次提交
    • M
      MIPS: csum_partial.S CPU_DADDI_WORKAROUNDS bug fix · 44ba138f
      Maciej W. Rozycki 提交于
      This change reverts most of commit
      60724ca5 [MIPS: IP checksums: Remove
      unncessary .set pseudos] that introduced warnings with the
      CPU_DADDI_WORKAROUNDS option set:
      
      arch/mips/lib/csum_partial.S: Assembler messages:
      arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3"
      arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3"
      arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3"
      arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3"
      arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3"
      arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3"
      arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3"
      arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3"
      arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3"
      arch/mips/lib/csum_partial.S:467: Warning: used $3 with ".set at=$3"
      [...]
      arch/mips/lib/csum_partial.S:577: Warning: used $3 with ".set at=$3"
      arch/mips/lib/csum_partial.S:577: Warning: used $3 with ".set at=$3"
      arch/mips/lib/csum_partial.S:577: Warning: used $3 with ".set at=$3"
      arch/mips/lib/csum_partial.S:601: Warning: used $3 with ".set at=$3"
      arch/mips/lib/csum_partial.S:601: Warning: used $3 with ".set at=$3"
      arch/mips/lib/csum_partial.S:601: Warning: used $3 with ".set at=$3"
      arch/mips/lib/csum_partial.S:601: Warning: used $3 with ".set at=$3"
      [and so on, and so on...]
      
      The warnings are benign and good code is produced regardless because no
      macros that'd use the assembler's temporary register are involved, however
      the `.set noat' directives removed by the commit referred are crucial to
      guarantee this is still going to be the case after any changes in the
      future.  Therefore they need to be brought back to place which this
      change does.
      Signed-off-by: NMaciej W. Rozycki <macro@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/6686/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      44ba138f
    • M
      MIPS: __strncpy_from_user_asm CPU_DADDI_WORKAROUNDS bug fix · 465ca5d6
      Maciej W. Rozycki 提交于
      This corrects assembler warnings and broken code generated in
      __strncpy_from_user_asm:
      
      arch/mips/lib/strncpy_user.S: Assembler messages:
      arch/mips/lib/strncpy_user.S:52: Warning: Macro instruction expanded into
      multiple instructions in a branch delay slot
      
      with the CPU_DADDI_WORKAROUNDS option set.  The function schedules delay
      slots manually where there is really no need to as GAS is happy to do it
      all itself, so undo it all and remove `.set noreorder'.
      Signed-off-by: NMaciej W. Rozycki <macro@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/6685/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      465ca5d6
    • M
      MIPS: __delay CPU_DADDI_WORKAROUNDS bug fix · 2db4bc34
      Maciej W. Rozycki 提交于
      With CPU_DADDI_WORKAROUNDS enabled __delay assembles with a macro in a
      branch delay slot:
      
      {standard input}: Assembler messages:
      {standard input}:18: Warning: Macro instruction expanded into multiple
      instructions in a branch delay slot
      
      and broken code results:
      
      0000000000000000 <__delay>:
         0:	1480ffff 	bnez	a0,0 <__delay>
         4:	24010001 	li	at,1
         8:	0081202f 	dsubu	a0,a0,at
         c:	03e00008 	jr	ra
        10:	00000000 	nop
        14:	00000000 	nop
      
      Consequently the function loops indefinitely, showing up prominently as a
      hang in the delay loop calibration at bootstrap.
      
      This change corrects the problem by forcing the immediate 1 into a
      register while keeping code produced identical where CPU_DADDI_WORKAROUNDS
      is disabled.
      Signed-off-by: NMaciej W. Rozycki <macro@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/6669/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      2db4bc34
  9. 27 3月, 2014 17 次提交
  10. 25 1月, 2014 1 次提交
  11. 15 7月, 2013 1 次提交
    • P
      MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code · 078a55fc
      Paul Gortmaker 提交于
      commit 3747069b25e419f6b51395f48127e9812abc3596 upstream.
      
      The __cpuinit type of throwaway sections might have made sense
      some time ago when RAM was more constrained, but now the savings
      do not offset the cost and complications.  For example, the fix in
      commit 5e427ec2 ("x86: Fix bit corruption at CPU resume time")
      is a good example of the nasty type of bugs that can be created
      with improper use of the various __init prefixes.
      
      After a discussion on LKML[1] it was decided that cpuinit should go
      the way of devinit and be phased out.  Once all the users are gone,
      we can then finally remove the macros themselves from linux/init.h.
      
      Note that some harmless section mismatch warnings may result, since
      notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c)
      and are flagged as __cpuinit  -- so if we remove the __cpuinit from
      the arch specific callers, we will also get section mismatch warnings.
      As an intermediate step, we intend to turn the linux/init.h cpuinit
      related content into no-ops as early as possible, since that will get
      rid of these warnings.  In any case, they are temporary and harmless.
      
      Here, we remove all the MIPS __cpuinit from C code and __CPUINIT
      from asm files.  MIPS is interesting in this respect, because there
      are also uasm users hiding behind their own renamed versions of the
      __cpuinit macros.
      
      [1] https://lkml.org/lkml/2013/5/20/589
      
      [ralf@linux-mips.org: Folded in Paul's followup fix.]
      Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/5494/
      Patchwork: https://patchwork.linux-mips.org/patch/5495/
      Patchwork: https://patchwork.linux-mips.org/patch/5509/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      078a55fc
  12. 17 5月, 2013 1 次提交
  13. 09 5月, 2013 4 次提交
  14. 08 5月, 2013 2 次提交