This reverts commit e4df3a0b
("i2c: core: Dispose OF IRQ mapping at client removal time")

Calling irq_dispose_mapping() will destroy the mapping and disassociate
the IRQ from the IRQ chip to which it belongs. Keeping it is OK, because
existent mappings are reused properly.

Also, this commit breaks drivers using devm* for IRQ management on
OF-based systems because devm* cleanup happens in device code, after
bus's remove() method returns.
Signed-off-by: NJakub Kicinski <kubakici@wp.pl>
Reported-by: NSébastien Szymanski <sebastien.szymanski@armadeus.com>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>
[wsa: updated the commit message with findings fromt the other bug report]
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org
Fixes: e4df3a0b

This patch marks baytrail_i2c_acquire() that it might sleep. Also it chages
while-loop to do-while and, though it is matter of taste, gives a chance to
check one more time before report a timeout.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: NDavid E. Box <david.e.box@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

It seems the idea behind the cross-check is to prevent acquire semaphore when
there is no release callback and vice versa. Thus, patch fixes a typo.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: NDavid E. Box <david.e.box@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

There is no need to export functions that are used as the callbacks in the
struct dw_i2c_dev. Otherwise we get the following warnings:

drivers/i2c/busses/i2c-designware-baytrail.c:63:5: warning: symbol 'baytrail_i2c_acquire' was not declared. Should it be static?
drivers/i2c/busses/i2c-designware-baytrail.c:114:6: warning: symbol 'baytrail_i2c_release' was not declared. Should it be static?

While here, do few indentation fixes, remove i2c_dw_eval_lock_support() from
functions exported to the modules and redundant assignment of local sem
variable.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: NDavid E. Box <david.e.box@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

It seems we have same message for different return values in get_sem() and
baytrail_i2c_acquire(). I suspect this is just a typo, so this patch fixes it.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: NDavid E. Box <david.e.box@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The patch converts hardcoded numerical constants to a named ones.

While here, align the variable name in get_sem() and reset_semaphore().
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: NDavid E. Box <david.e.box@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

For, !HAVE_CLK the clk API returns a NULL cookie. Rework the
initialization code to handle that. If clk_get_rate() delivers 0, we use
the fallback mechanisms. The patch is pretty easy when ignoring white
space issues (git diff -b).
Suggested-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
Tested-by: NMax Filippov <jcmvbkbc@gmail.com>

IOSF_MBI is tristate. Baytrail driver isn't.
Reported-by: NRandy Dunlap <rdunlap@infradead.org>
Acked-by: NDavid E. Box <david.e.box@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Add initial support to the Broadcom iProc I2C controller found in the
iProc family of SoCs.

The iProc I2C controller has separate internal TX and RX FIFOs, each has
a size of 64 bytes. The iProc I2C controller supports two bus speeds
including standard mode (100kHz) and fast mode (400kHz)
Signed-off-by: NRay Jui <rjui@broadcom.com>
Reviewed-by: NScott Branden <sbranden@broadcom.com>
Reviewed-by: NKevin Cernekee <cernekee@chromium.org>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

While here, fix few indentations issues across the code. There is no functional
change.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Allow bus clock specification as a common clock handle. This makes this
controller easier to use in a setup based on common clock framework.
Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Commit 9439eb3a ("asm-generic: io: implement relaxed
accessor macros as conditional wrappers") has added
{read,write}{b,w,l,q}_relaxed to include/asm-generic/io.h.
So COMPILE_TEST can be added.
Signed-off-by: NZhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

There was quite some confusion why this completion is there and if it is
still necessary. Sadly, it is. However, let's improve the comments and
share what we rediscovered.
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

clock-frequency property is meant to control the bus frequency for i2c bus
drivers, but it was incorrectly used to specify i2c controller input clock
frequency.
Introduce new attribute, opencores,ip-clock-frequency, that specifies i2c
controller clock frequency and make clock-frequency attribute compatible
with other i2c drivers. Maintain backwards compatibility in case
opencores,ip-clock-frequency attribute is missing.
Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

DMA read requests could miss proper termination, so two more bytes would
have been read via PIO overwriting the end of the buffer with wrong
data. Make DMA stop handling more readable while we are here.
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Make the slave support depend on CONFIG_I2C_SLAVE. Otherwise it gets
included unconditionally, even when it is not needed.

I2C bus drivers which implement slave support must select
I2C_SLAVE.
Signed-off-by: NJean Delvare <jdelvare@suse.de>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Support CPU BE mode by adding endianness conversion for memcpy interactions.
Signed-off-by: NDmitry Osipenko <digetx@gmail.com>
Acked-by: NAlexandre Courbot <acourbot@nvidia.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

IOSF_MBI depends on PCI, so we should not select it but depend on it.
This ensures also we compile on X86 only, other archs will break because
of an arch specific include. Also depend on ACPI since this driver uses
it.
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
Acked-by: NDavid E. Box <david.e.box@linux.intel.com>

Do SCL timing parameter calculation conditionally depending are custom
parameters provided since calculated values will get instantly overwritten
by provided parameters.
Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Trying to register an I2C device asynchronously (via async_schedule() call)
results in an ugly warning from request_module() warning about potential
deadlock (because request_module tries to wait for async works to
complete). While we could try to switch to request_module_nowait(), other
buses, as well as I2C itself when not using device tree, do not try to load
modules, but rather rely on the standard infrastructure (udev) to execute
module loading, and we should be doing the same.
Signed-off-by: NDmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This patch implements an I2C bus sharing mechanism between the host and platform
hardware on select Intel BayTrail SoC platforms using the X-Powers AXP288 PMIC.

On these platforms access to the PMIC must be shared with platform hardware. The
hardware unit assumes full control of the I2C bus and the host must request
access through a special semaphore. Hardware control of the bus also makes it
necessary to disable runtime pm to avoid interfering with hardware transactions.
Signed-off-by: NDavid E. Box <david.e.box@linux.intel.com>
Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Adds support for acquiring and releasing a hardware bus lock in the i2c
designware core transfer function. This is needed for i2c bus controllers
that are shared with but not controlled by the kernel.
Signed-off-by: NDavid E. Box <david.e.box@linux.intel.com>
Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This patch solves deadlock between clock prepare mutex and regmap mutex reported
by Tomasz Figa in [1] by implementing solution from [2]: "always leave the clock
of the i2c controller in a prepared state".

[1] https://lkml.org/lkml/2014/7/2/171
[2] https://lkml.org/lkml/2014/7/2/207

On each i2c transfer handled by s3c24xx_i2c_xfer(), clk_prepare_enable() was
called, which calls clk_prepare() then clk_enable(). clk_prepare() takes
prepare_lock mutex before proceeding. Note that i2c transfer functions are
invoked from many places in kernel, typically with some other additional lock
held.

It may happen that function on CPU1 (e.g. regmap_update_bits()) has taken a
mutex (i.e. regmap lock mutex) then it attempts i2c communication in order to
proceed (so it needs to obtain clock related prepare_lock mutex during transfer
preparation stage due to clk_prepare() call). At the same time other task on
CPU0 wants to operate on clock (e.g. to (un)prepare clock for some other reason)
so it has taken prepare_lock mutex.

CPU0:                        CPU1:
clk_disable_unused()         regulator_disable()
  clk_prepare_lock()           map->lock(map->lock_arg)
  regmap_read()                s3c24xx_i2c_xfer()
    map->lock(map->lock_arg)     clk_prepare_lock()

Implemented solution from [2] leaves i2c clock prepared. Preparation is done in
s3c24xx_i2c_probe() function. Without this patch, it is immediately unprepared
by clk_disable_unprepare() call. I've replaced this call with clk_disable() and
I've added clk_unprepare() call in s3c24xx_i2c_remove().

The s3c24xx_i2c_xfer() function now uses clk_enable() instead of
clk_prepare_enable() (and clk_disable() instead of clk_unprepare_disable()).
Signed-off-by: NPaul Osmialowski <p.osmialowsk@samsung.com>
Reviewed-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
Cc: stable@kernel.org

Due to a copy&paste error, the last byte of the shared memory was not
accessible via sysfs.
Reported-by: NDebora Grosse <debora@mds.com>
Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Add i2c-mux-idle-disconnect device tree property to PCA954x mux driver. The new
property forces the multiplexer to disconnect child buses in idle state. This is
used, for example, when there are several multiplexers on the same bus and the
devices on the underlying buses might have same I2C addresses.
Signed-off-by: NAlexander Sverdlin <alexander.sverdlin@nsn.com>
[wsa: added a newline]
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

readl/writel is too expensive especially on Cortex A9 w/ outer L2 cache.
This introduces i2c read/write delays on Marvell BG2/BG2Q SoCs when there
are heavy L2 cache maintenance operations at the same time.

The driver does not perform DMA, so it's safe to use the relaxed version.
From another side, the relaxed io accessor macros are available on all
architectures now, so we can use the relaxed versions instead.
Signed-off-by: NJisheng Zhang <jszhang@marvell.com>
Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The clk_khz field makes sense only if SS counters are not provided. Since we
provide them for Haswell and Baytrail explicitly we may omit the clk_khz
parameter.
Reviewed-by: NJarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The Moorestown support bits were removed few years ago. This is a follow up to
that changes.
Suggested-by: NDavid Cohen <david.a.cohen@linux.intel.com>
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

This patch fixes up some whitespace issues and addresses a few
checkpatch warnings.
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Acked-by: NFugang Duan <B38611@freescale.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Declaring attribute groups can be done with macros these days, let's use
them for consistency and readability reasons. Also, put the ATTR macros
directly below the referenced functions while we are here.
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The ret variable is set and never used in the error path of i2c_imx_dma_request.
Signed-off-by: NPhilipp Zabel <p.zabel@pengutronix.de>
Acked-by: NFugang Duan <B38611@freescale.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

ACPI specification allows I2C devices with multiple addresses. The current
implementation goes over all addresses and assigns the last one to the
device. This is typically not the primary address of the device.

Instead of doing that we assign the first address to the device and then
let the driver handle rest of the addresses as it wishes.
Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Cadence I2C controller has the following bugs:
- completion indication is not given to the driver at the end of
a read/receive transfer with HOLD bit set.
- Invalid read transaction are generated on the bus when HW timeout
condition occurs with HOLD bit set.

As a result of the above, if a set of messages to be transferred with
repeated start includes any message following a read message,
completion is never indicated and timeout occurs.
Hence a check is implemented to return -EOPNOTSUPP for such sequences.
Signed-off-by: NHarini Katakam <harinik@xilinx.com>
Signed-off-by: NVishnu Motghare <vishnum@xilinx.com>
[wsa: fixed some whitespaces]
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

wait_for_completion_timeout does not return negative values so
"result" handling here should be simplified to cover the actually
possible cases only.
Signed-off-by: NNicholas Mc Guire <der.herr@hofr.at>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

On Rockchip I2C the controller drops SDA low slightly too soon to meet
the "repeated start" requirements.

>From my own experimentation over a number of rates:
 - controller appears to drop SDA at .875x (7/8) programmed clk high.
 - controller appears to keep SCL high for 2x programmed clk high.

The first rule isn't enough to meet tSU;STA requirements in
Standard-mode on the system I tested on.  The second rule is probably
enough to meet tHD;STA requirements in nearly all cases (especially
after accounting for the first), but it doesn't hurt to account for it
anyway just in case.

Even though the repeated start requirement only need to be accounted
for during a small part of the transfer, we'll adjust the timings for
the whole transfer to meet it.  I believe that adjusting the timings
in just the right place to switch things up for repeated start would
require several extra interrupts and that doesn't seem terribly worth
it.

With this change and worst case rise/fall times, I see 100kHz i2c
going to ~85kHz.  With slightly optimized rise/fall (800ns / 50ns) I
see i2c going to ~89kHz.  Fast-mode isn't affected much because
tSU;STA is shorter relative to tHD;STA there.

As part of this change we needed to account for the SDA falling time.
The specification indicates that this should be the same, but we'll
follow Designware's lead and add a binding.  Note that we deviate from
Designware and assign the default SDA falling time to be the same as
the SCL falling time, which is incredibly likely.
Signed-off-by: NDoug Anderson <dianders@chromium.org>
[wsa: rebased to i2c/for-next]
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The number of clock cycles to be written into the CLKDIV register
that determines the I2C clk high phase includes the rise time.
So to meet the timing requirements defined in the I2C specification
which defines the minimal time SCL has to be high, the rise time
has to taken into account. The same applies to the low phase with
falling time.

In my test on RK3288-Pink2 board, which is not an upstream board yet,
if external pull-up resistor is 4.7K, rise_ns is about 700ns.
So the measured high_ns is about 3900ns, which is less than 4000ns
(the minimum high_ns in I2C specification for Standard-mode).

To fix this bug min_low_ns should include fall time and min_high_ns
should include rise time.

This patch merged the patch from chromium project which can get the
rise and fall times for signals from the device tree. This allows us
to more accurately calculate timings. see:
https://chromium-review.googlesource.com/#/c/232774/Signed-off-by: NAddy Ke <addy.ke@rock-chips.com>
Reviewed-by: NDoug Anderson <dianders@chromium.org>
Tested-by: NDoug Anderson <dianders@chromium.org>
[wsa: fixed a typo in the docs]
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The I2C controller sends a NACK to the slave when transfer size register
reaches zero, irrespective of the hold bit. So, in order to handle transfers
greater than 252 bytes, the transfer size register has to be maintained at a
value >= 1. This patch implements the same.
The interrupt status is cleared at the beginning of the isr instead of
the end, to avoid missing any interrupts.
Signed-off-by: NHarini Katakam <harinik@xilinx.com>
[wsa: added braces around else branch]
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

CPPCHECK rightfully says:

drivers/i2c/busses/i2c-pmcmsp.c:151: style: The function 'pmcmsptwi_reg_to_clock' is never used.
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Support for keyword 'boolean' will be dropped later on.

No functional change.

Reference: http://lkml.kernel.org/r/cover.1418003065.git.cj@linux.comSigned-off-by: NChristoph Jaeger <cj@linux.com>
Signed-off-by: NMichal Marek <mmarek@suse.cz>

There haven't been any I2C driver that use the legacy suspend/resume
callbacks for a while now and new drivers are supposed to use PM ops. So
remove support for legacy suspend/resume for I2C drivers.

Since there aren't any special bus specific things to do during
suspend/resume and since the PM core will automatically fallback directly to
using the device's PM ops if no bus PM ops are specified there is no need to
have any I2C bus PM ops.
Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>