1. 21 2月, 2019 1 次提交
  2. 15 1月, 2019 1 次提交
  3. 14 7月, 2018 1 次提交
  4. 11 5月, 2018 2 次提交
  5. 30 1月, 2018 6 次提交
  6. 15 7月, 2017 2 次提交
    • S
      drm: add helper functions for YCBCR420 handling · 2570fe25
      Shashank Sharma 提交于
      This patch adds helper functions for YCBCR 420 handling.
      These functions do:
      - check if a given video mode is YCBCR 420 only mode.
      - check if a given video mode is YCBCR 420 also mode.
      
      V2: Added YCBCR functions as helpers in DRM layer, instead of
          keeping it in I915 layer.
      V3: Added handling for YCBCR-420 only modes too.
      V4: EXPORT_SYMBOL(drm_find_hdmi_output_type)
      V5: Addressed review comments from Danvet:
          - %s/drm_find_hdmi_output_type/drm_display_info_hdmi_output_type
          - %s/drm_can_support_ycbcr_output/drm_display_supports_ycbcr_output
          - %s/drm_can_support_this_ycbcr_output/
      		drm_display_supports_this_ycbcr_output
          - pass drm_display_info instead of drm_connector for consistency
          - For drm_get_highest_quality_ycbcr_supported doc, move the variable
            description above, and then the function description.
      V6: Add only YCBCR420 helpers (Ville)
      V7: Addressed review comments from Ville
          - Remove cea_vic_valid() check.
          - Fix indentation.
          - Make input parameters to helpers, const.
      
      Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
      Cc: Jose Abreu <Jose.Abreu@synopsys.com>
      Cc: Daniel Vetter <daniel.vetter@intel.com>
      Signed-off-by: NShashank Sharma <shashank.sharma@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1499960000-9232-9-git-send-email-shashank.sharma@intel.com
      [vsyrjala: Fix sparse indentation warn]
      Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      2570fe25
    • S
      drm: add helper to validate YCBCR420 modes · d8523153
      Shashank Sharma 提交于
      YCBCR420 modes are supported only on HDMI 2.0 capable sources.
      This patch adds:
      - A drm helper to validate YCBCR420-only mode on a particular
        connector. This function will help pruning the YCBCR420-only
        modes from the connector's modelist.
      - A bool variable (ycbcr_420_allowed) in the drm connector structure.
        While handling the EDID from HDMI 2.0 sinks, its important to know
        if the source is capable of handling YCBCR420 output, so that no
        YCBCR 420 modes will be listed for sources which can't handle it.
        A driver should set this variable if it wants to see YCBCR420 modes
        in the modedb.
      
      V5: Introduced the patch in series.
      V6: Squashed two patches (validate YCBCR420 and add YCBCR420
      	   identifier)
      V7: Addressed review comments from Vile:
          - Move this patch before we add 420 modes from EDID.
          - No need for drm_valid_cea_vic() check, function back to non-static.
          - Update MODE_STATUS with NO_420 condition.
          - Introduce y420_vdb_modes variable in this patch
      
      Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
      Signed-off-by: NShashank Sharma <shashank.sharma@intel.com>
      Link: http://patchwork.freedesktop.org/patch/msgid/1499960000-9232-6-git-send-email-shashank.sharma@intel.com
      [vsyrjala: Drop the now bogus EXPORT_SYMBOL(drm_valid_cea_vic)]
      Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      d8523153
  7. 31 5月, 2017 1 次提交
  8. 26 1月, 2017 1 次提交
  9. 19 9月, 2016 2 次提交
  10. 29 8月, 2016 1 次提交
  11. 17 8月, 2016 1 次提交
  12. 16 8月, 2016 1 次提交
    • D
      drm: Extract drm_framebuffer.[hc] · 7520a277
      Daniel Vetter 提交于
      Also start with drm_modeset.h with the core bits, since we need
      to untangle this mess somehow. That allows us to move the drm_modes.h
      include to the right spot, except for the temporary connector status
      enum. That will get fixed as soon as drm_connector.h exists.
      
      v2: Rebase.
      
      v3: Move drm_crtc_force_disable_all back again, that wasn't meant to
      be moved (Sean).
      
      v4: Rebase.
      
      Cc: Sean Paul <seanpaul@chromium.org>
      Reviewed-by: NSean Paul <seanpaul@chromium.org>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      7520a277
  13. 08 8月, 2016 2 次提交
  14. 04 6月, 2016 1 次提交
  15. 11 12月, 2015 2 次提交
  16. 09 12月, 2015 1 次提交
  17. 01 12月, 2015 1 次提交
    • V
      drm/edid: Make the detailed timing CEA/HDMI mode fixup accept up to 5kHz clock difference · 4c6bcf44
      Ville Syrjälä 提交于
      Rather than using drm_match_cea_mode() to see if the EDID detailed
      timings are supposed to represent one of the CEA/HDMI modes, add a
      special version of that function that takes in an explicit clock
      tolerance value (in kHz). When looking at the detailed timings specify
      the tolerance as 5kHz due to the 10kHz clock resolution limit inherent
      in detailed timings.
      
      drm_match_cea_mode() uses the normal KHZ2PICOS() matching of clocks,
      which only allows smaller errors for lower clocks (eg. for 25200 it
      won't allow any error) and a bigger error for higher clocks (eg. for
      297000 it actually matches 296913-297000). So it doesn't really match
      what we want for the fixup. Using the explicit +-5kHz is much better
      for this use case.
      
      Not sure if we should change the normal mode matching to also use
      something else besides KHZ2PICOS() since it allows a different
      proportion of error depending on the clock. I believe VESA CVT
      allows a maximum deviation of .5%, so using that for normal mode
      matching might be a good idea?
      
      Cc: Adam Jackson <ajax@redhat.com>
      Tested-by: nathan.d.ciobanu@linux.intel.com
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=92217
      Fixes: fa3a7340 ("drm/edid: Fix up clock for CEA/HDMI modes specified via detailed timings")
      Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Reviewed-by: NAdam Jackson <ajax@redhat.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      4c6bcf44
  18. 22 5月, 2015 1 次提交
  19. 23 2月, 2015 1 次提交
  20. 08 1月, 2015 1 次提交
  21. 18 12月, 2014 2 次提交
  22. 06 12月, 2014 1 次提交
  23. 01 5月, 2014 1 次提交
  24. 13 3月, 2014 6 次提交