- 19 2月, 2011 2 次提交
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由 Ryan Mallon 提交于
Signed-off-by: NRyan Mallon <ryan@bluewatersys.com> Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Ryan Mallon 提交于
Replace the static inline functions for gpio_to_irq/irq_to_gpio so that they can be used in static initialisers. Signed-off-by: NRyan Mallon <ryan@bluewatersys.com> Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 18 2月, 2011 1 次提交
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由 Russell King 提交于
This uncouple PHYS_OFFSET from the platform definitions, thereby facilitating run-time computation of the physical memory offset. Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org> Acked-by: NViresh Kumar <viresh.kumar@st.com> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: NMagnus Damm <damm@opensource.se> Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NWan ZongShun <mcuos.com@gmail.com> Acked-by: NKukjin Kim <kgene.kim@samsung.com> Acked-by: NEric Miao <eric.y.miao@gmail.com> Acked-by: NJiandong Zheng <jdzheng@broadcom.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 15 1月, 2011 3 次提交
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由 Igor Plyatov 提交于
The GS_IA18_S (GMS) is a carrier board from GeoSIG Ltd used with the Stamp9G20 SoM from Taskit company. It operate as an internet accelerometer. Signed-off-by: NIgor Plyatov <plyatov@gmail.com> [nicolas.ferre@atmel.com: rm Kconfig, whitespace fixes, change machine name] Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Sergio Tanzilli 提交于
Signed-off-by: NSergio Tanzilli <tanzilli@acmesystems.it> [nicolas.ferre@atmel.com: whitespace fixes, change machine name] Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Jesper Juhl 提交于
Signed-off-by: NJesper Juhl <jj@chaosbits.net> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 14 1月, 2011 1 次提交
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由 Lennert Buytenhek 提交于
Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca>
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- 22 12月, 2010 1 次提交
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由 Yauhen Kharuzhy 提交于
The AT91 MCI has special SDIO transfer types: SDIO block and SDIO byte transfers, but at91_mci driver doesn't use them and handles all SDIO transfers as ordinary MMC block transfers. This causes problems for multiple-block SDIO transfers (in particular for 256-bytes blocks). Fix this situation by checking the opcode for SDIO CMD53 and setting the transfer type in the AT91_MCI_CMDR register properly. This patch was tested with libertas SDIO driver: problem with TX timeouts on big packets was eliminated. Signed-off-by: NYauhen Kharuzhy <yauhen.kharuzhy@promwad.com> Cc: <stable@kernel.org> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NChris Ball <cjb@laptop.org>
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- 19 12月, 2010 1 次提交
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由 Russell King 提交于
In d7e81c26 (clocksource: Add clocksource_register_hz/khz interface) new interfaces were added which simplify (and optimize) the selection of the divisor shift/mult constants. Switch over to using this new interface. Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 17 12月, 2010 2 次提交
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由 Christian Glindkamp 提交于
As PControl G20 is a carrier board for the Stamp9G20 SoM, some code can be shared. Therefore board-stamp9g20.c is refactored to allow reusing the SoM initialization and board-pcontrol-g20.c is modified to use it. Signed-off-by: NChristian Glindkamp <christian.glindkamp@taskit.de> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Ryan Mallon 提交于
The uhpck clock should be divided from the utmi clock, not its parent (main). This change is mostly cosmetic as the uhpck rate value is not used anywhere except for the debugfs clock output. Signed-off-by: NRyan Mallon <ryan@bluewatersys.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 01 12月, 2010 6 次提交
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for the epson frambuffer support it's CONFIG_FB_S1D13XXX not CONFIG_FB_S1D135XX Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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as based on http://www.picotux.com/pt200/picotux200.pdf these board does not have such I/O Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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to be a few more concistant with the other boards as ek is for evaluation kit and dk for development kit Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NAndrew Victor <linux@maxim.org.za>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NAndrew Victor <linux@maxim.org.za>
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Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NAndrew Victor <linux@maxim.org.za>
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Convert the following AT91RM9200-based boards to the new-style UART initialization: - Ajeco 1ARM Single Board Computer - Sperry-Sun KAFA board - picotux 200 Remove the deprecated at91_init_serial Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NAndrew Victor <linux@maxim.org.za>
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- 16 11月, 2010 1 次提交
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由 Lionel Debroux 提交于
While at it, fix two checkpatch errors. Several non-const struct instances constified by this patch were added after the introduction of platform_suspend_ops in checkpatch.pl's list of "should be const" structs (79404849). Patch against mainline. Inspired by hunks of the grsecurity patch, updated for newer kernels. Signed-off-by: NLionel Debroux <lionel_debroux@yahoo.fr> Acked-by: NIngo Molnar <mingo@elte.hu> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 02 11月, 2010 1 次提交
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由 Uwe Kleine-König 提交于
"gadget", "through", "command", "maintain", "maintain", "controller", "address", "between", "initiali[zs]e", "instead", "function", "select", "already", "equal", "access", "management", "hierarchy", "registration", "interest", "relative", "memory", "offset", "already", Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 26 10月, 2010 8 次提交
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由 Nicolas Ferre 提交于
This adds the support of atmel-mci sd/mmc driver in at91sam9g45 devices and board files. This also configures the DMA controller slave interface for at_hdmac dmaengine driver. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
When using CP15 cache operations (c7), we make sure that Rd (r0) is actually 0 as ARM 926 TRM is saying. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
For power management at91_pm_enter() routine, use the cpu_do_idle() for a rock solid "wait for interrupt" implementation. For AT91SAM9 ARM 926 based chips, we can exceed the cache line length as we can access RAM even while in self-refresh mode. We keep plain access to CP15 for at91rm9200 as this feature is not available: instructions have to be in a single cache line. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
Several at91sam9 chips need the alternate reset procedure to be sure to halt SDRAM smoothly before resetting the chip. This is an extension of previous patch "Fix AT91SAM9G20 reset" to all chips affected. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
Generalize assembler reset routine to allow use on several at91sam9 chips. This patch replace double definitions of SDRAM controller registers and RSTC registers with use of classical header files. For this rework, we remove the not needed icache flush as it is already done in the calling function: arm_machine_restart(). Rename at91sam9g20_reset.S to generalize to several chips. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
Preparing next patch with longer names Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Peter Horton 提交于
If the SDRAM is not cleanly shutdown before reset it can be left driving the bus, which then stops the bootloader booting from NAND. Signed-off-by: NPeter Horton <phorton@bitbox.co.uk> [nicolas.ferre@atmel.com: change file header line order] Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Peter Gsellmann 提交于
Board is a carrier board for Stamp9G20, with additional peripherals for a building automation system Signed-off-by: NPeter Gsellmann <pgsellmann@portner-elektronik.at> [nicolas.ferre@atmel.com: remove machine_desc.io_pg_offst and .phys_io] Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 20 10月, 2010 2 次提交
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由 Nicolas Pitre 提交于
Since we're now using addruart to establish the debug mapping, we can remove the io_pg_offst and phys_io members of struct machine_desc. The various declarations were removed using the following script: grep -rl MACHINE_START arch/arm | xargs \ sed -i '/MACHINE_START/,/MACHINE_END/ { /\.\(phys_io\|io_pg_offst\)/d }' [ Initial patch was from Jeremy Kerr, example script from Russell King ] Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org> Acked-by: Eric Miao <eric.miao at canonical.com>
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由 Jeremy Kerr 提交于
Rather than checking the MMU status in every instance of addruart, do it once in kernel/debug.S, and change the existing addruart macros to return both physical and virtual addresses. The main debug code can then select the appropriate address to use. This will also allow us to retreive the address of a uart for the MMU state that we're not current in. Updated with fixes for OMAP from Jason Wang <jason77.wang@gmail.com> and Tony Lindgren <tony@atomide.com>, and fix for versatile express from Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>. Signed-off-by: NJeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: NJason Wang <jason77.wang@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com> Tested-by: NKevin Hilman <khilman@deeprootsystems.com>
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- 18 10月, 2010 1 次提交
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由 Justin P. Mattock 提交于
The patch below updates broken web addresses in the arch directory. Signed-off-by: NJustin P. Mattock <justinmattock@gmail.com> Signed-off-by: NMaciej W. Rozycki <macro@linux-mips.org> Cc: Finn Thain <fthain@telegraphics.com.au> Cc: Randy Dunlap <rdunlap@xenotime.net> Reviewed-by: NFinn Thain <fthain@telegraphics.com.au> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 08 10月, 2010 6 次提交
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由 Anders Larsen 提交于
According to Atmel, their 926T processors (AT91 post RM9200) requires 'Wait for Interrupt' mode be entered right after disabling the processor clock in order to minimise current consumption when idle, so do both provided we're not running on a 920T (an RM9200). Furthermore, get rid of the #ifndef CONFIG_DEBUG_KERNEL, since arch_idle() can be turned off completely with the kernel parameter 'nohlt'. Cc: Andrew Victor <avictor.za@gmail.com> Signed-off-by: NAnders Larsen <al@alarsen.net> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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Many Atmel SOC are embedding a MACB controller. This patch removes the long dependency line for this Atmel MACB ethernet driver configuration entry. The HAVE_NET_MACB configuration option is located in the net Kconfig file as it may be setup by ARM/AT91 and AVR32 chips. Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: David Miller <davem@davemloft.net> Cc: Haavard Skinnemoen <hskinnemoen@atmel.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Acked-by: NAndrew Victor <linux@maxim.org.za>
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由 Greg Ungerer 提交于
The simpler AT91x40 processors do not have the same power management controller as the new AT91 devices. They do have a simpler power controller module that we can use to disable the CPU clock at idle time. Add code to support that. Signed-off-by: NGreg Ungerer <gerg@uclinux.org> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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The board-sam9g20ek-2slot-mmc.c was a revision of the at91sam9g20ek since board revision C. It contains 2 sd/mmc slots. This merge keep the support of the old machine ID MACH_AT91SAM9G20EK_2MMC for backward compatibility. Now we use the ATAG to pass the hardware functionality to kernel with this board revision encoding bit 0: 0 => 1 sd/mmc slot 1 => 2 sd/mmc slots connectors (board from revision C) system_rev tested on Barebox commit d8f3ee103a9f4bd Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
The MTD nand driver for Atmel chips is atmel_nand and not at91_nand anymore. Change wrong configuration variables that were remaining. Reported-by: NChristoph Egger <siccegge@cs.fau.de> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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Today the board use 2 machines id AT91SAM9G45EKES and AT91SAM9M10G45EK now will use only AT91SAM9M10G45EK. The other boards revision will be specified via system_rev. for 9g45ekes, m10g45ekes and m10g45ek boards and revisions Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 05 10月, 2010 1 次提交
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由 Maxim Osipov 提交于
This patch adds support for Flexibity Connect platform from http://www.flexibity.com/ (AT91SAM9260 based). Signed-off-by: NMaxim Osipov <maxim.osipov@gmail.com> Acked-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NAndrew Victor <linux@maxim.org.za> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 23 9月, 2010 1 次提交
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由 Peter Korsgaard 提交于
Use a correct udelay value to get bus speed around 100KHz. The udelay value was most likely copied from the older devices, but the 9g45 is signicantly faster (400MHz, DDR, ..), so a udelay of 2 gives a bus speed of around 190KHz, which is too fast for some devices. A udelay value of 5 gives a bus speed of around 90KHz here. Signed-off-by: NPeter Korsgaard <jacmet@sunsite.dk> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 10 9月, 2010 2 次提交
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由 Nicolas Ferre 提交于
Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Nicolas Ferre 提交于
The sd/mmc data structure is not used if SPI is selected. The configuration of PIO on the board prevent from using both interfaces at the same time (board dependent). Remove the warnings at compilation time adding a preprocessor condition. Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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