1. 10 3月, 2017 8 次提交
    • T
      net: mvpp2: introduce an intermediate union for the TX/RX descriptors · 054f6372
      Thomas Petazzoni 提交于
      Since the format of the HW descriptors is different between PPv2.1 and
      PPv2.2, this commit introduces an intermediate union, with for now
      only the PPv2.1 descriptors. The bulk of the driver code only
      manipulates opaque mvpp2_tx_desc and mvpp2_rx_desc pointers, and the
      descriptors can only be accessed and modified through the accessor
      functions. A follow-up commit will add the descriptor definitions for
      PPv2.2.
      Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      054f6372
    • T
      net: mvpp2: add hw_version field in "struct mvpp2" · faca9247
      Thomas Petazzoni 提交于
      In preparation to the introduction for the support of PPv2.2 in the
      mvpp2 driver, this commit adds a hw_version field to the struct
      mvpp2, and uses the .data field of the DT match table to fill it in.
      
      Having the MVPP21 and MVPP22 definitions available will allow to start
      adding the necessary conditional code to support PPv2.2.
      Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      faca9247
    • T
      net: mvpp2: add and use accessors for TX/RX descriptors · ac3dd277
      Thomas Petazzoni 提交于
      The PPv2.2 IP has a different TX and RX descriptor layout compared to
      PPv2.1. In order to prepare for the introduction of PPv2.2 support in
      mvpp2, this commit adds accessors for the different fields of the TX
      and RX descriptors, and changes the code to use them.
      
      For now, the mvpp2_port argument passed to the accessors is not used,
      but it will be used in follow-up to update the descriptor according to
      the version of the IP being used.
      
      Apart from the mechanical changes to use the newly introduced
      accessors, a few other changes, needed to use the accessors, are made:
      
       - The mvpp2_txq_inc_put() function now takes a mvpp2_port as first
         argument, as it is needed to use the accessors.
      
       - Similarly, the mvpp2_bm_cookie_build() gains a mvpp2_port first
         argument, for the same reason.
      
       - In mvpp2_rx_error(), instead of accessing the RX descriptor in each
         case of the switch, we introduce a local variable to store the
         packet size.
      
       - In mvpp2_tx_frag_process() and mvpp2_tx() instead of accessing the
         packet size from the TX descriptor, we use the actual value
         available in the function, which is used to set the TX descriptor
         packet size a few lines before.
      Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      ac3dd277
    • T
      net: mvpp2: store physical address of buffer in rx_desc->buf_cookie · 4e4a105f
      Thomas Petazzoni 提交于
      The RX descriptors of the PPv2 hardware allow to store several
      information, amongst which:
      
       - the DMA address of the buffer in which the data has been received
       - a "cookie" field, left to the use of the driver, and not used by the
         hardware
      
      In the current implementation, the "cookie" field is used to store the
      virtual address of the buffer, so that in the receive completion path,
      we can easily get the virtual address of the buffer that corresponds to
      a completed RX descriptors.
      
      On PPv2.1, used on 32-bit platforms, those two fields are 32-bit wide,
      which is enough to store a DMA address in the first field, and a virtual
      address in the second field.
      
      On PPv2.2, used on 64-bit platforms, these two fields have been extended
      to 40 bits. While 40 bits is enough to store a DMA address (as long as
      the DMA mask is 40 bits or lower), it is not enough to store a virtual
      address. Therefore, the "cookie" field can no longer be used to store
      the virtual address of the buffer.
      
      However, as Russell King pointed out, the RX buffers are always
      allocated in the kernel linear mapping, and therefore using
      phys_to_virt() on the physical address of the RX buffer is possible and
      correct.
      
      Therefore, this commit changes the driver to use the "cookie" field to
      store the physical address instead of the virtual
      address. phys_to_virt() is used in the receive completion path to
      retrieve the virtual address from the physical address.
      
      It is obviously important to realize that the DMA address and physical
      address are two different things, which is why we store both in the RX
      descriptors. While those addresses may be identical in some situations,
      it remains two distinct concepts, and both addresses should be handled
      separately.
      Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      4e4a105f
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      net: mvpp2: remove mvpp2_txq_pend_desc_num_get() function · 4d6c2a67
      Thomas Petazzoni 提交于
      The mvpp2_txq_pend_desc_num_get() function only selects a TX queue, and
      reads the number of pending descriptors. It is used in only one place,
      in mvpp2_txq_clean(), where the TX queue has already been selected by a
      write to MVPP2_TXQ_NUM_REG.
      
      Therefore, this function is useless, and the caller can simply read the
      value of the MVPP2_TXQ_PENDING_REG register instead.
      Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      4d6c2a67
    • T
      net: mvpp2: remove unused register definition MVPP2_TXQ_THRESH_REG · df905f2e
      Thomas Petazzoni 提交于
      This register is no longer used since commit edc660fa ("net: mvpp2:
      replace TX coalescing interrupts with hrtimer").
      Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      df905f2e
    • T
      net: mvpp2: remove support for buffer header · aeb3d110
      Thomas Petazzoni 提交于
      The "buffer header" functionality is a functionality used by the
      hardware to split an incoming packets over multiple BM buffers if they
      are not large enough. However, the mvpp2 driver guarantees that a pool
      of BM buffers has buffers with a size large enough to store MTU-sized
      packets. Therefore, this functionality is completely unused, and the
      code can be removed, and we should never get a descriptor with bit
      MVPP2_RXD_BUF_HDR set.
      Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      aeb3d110
    • T
      net: mvpp2: use "dma" instead of "phys" where appropriate · 20396136
      Thomas Petazzoni 提交于
      As indicated by Russell King, the mvpp2 driver currently uses a lot
      "phys" or "phys_addr" to store what really is a DMA address. This commit
      clarifies this by using "dma" or "dma_addr" where appropriate.
      
      This is especially important as we are going to introduce more changes
      where the distinction between physical address and DMA address will be
      key.
      Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      20396136
  2. 22 2月, 2017 13 次提交
  3. 20 2月, 2017 1 次提交
  4. 31 1月, 2017 1 次提交
  5. 09 1月, 2017 1 次提交
  6. 26 12月, 2016 1 次提交
    • T
      ktime: Cleanup ktime_set() usage · 8b0e1953
      Thomas Gleixner 提交于
      ktime_set(S,N) was required for the timespec storage type and is still
      useful for situations where a Seconds and Nanoseconds part of a time value
      needs to be converted. For anything where the Seconds argument is 0, this
      is pointless and can be replaced with a simple assignment.
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      8b0e1953
  7. 22 12月, 2016 1 次提交
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      net: mvpp2: fix dma unmapping of TX buffers for fragments · 8354491c
      Thomas Petazzoni 提交于
      Since commit 71ce391d ("net: mvpp2: enable proper per-CPU TX
      buffers unmapping"), we are not correctly DMA unmapping TX buffers for
      fragments.
      
      Indeed, the mvpp2_txq_inc_put() function only stores in the
      txq_cpu->tx_buffs[] array the physical address of the buffer to be
      DMA-unmapped when skb != NULL. In addition, when DMA-unmapping, we use
      skb_headlen(skb) to get the size to be unmapped. Both of this works fine
      for TX descriptors that are associated directly to a SKB, but not the
      ones that are used for fragments, with a NULL pointer as skb:
      
       - We have a NULL physical address when calling DMA unmap
       - skb_headlen(skb) crashes because skb is NULL
      
      This causes random crashes when fragments are used.
      
      To solve this problem, we need to:
      
       - Store the physical address of the buffer to be unmapped
         unconditionally, regardless of whether it is tied to a SKB or not.
      
       - Store the length of the buffer to be unmapped, which requires a new
         field.
      
      Instead of adding a third array to store the length of the buffer to be
      unmapped, and as suggested by David Miller, this commit refactors the
      tx_buffs[] and tx_skb[] arrays of 'struct mvpp2_txq_pcpu' into a
      separate structure 'mvpp2_txq_pcpu_buf', to which a 'size' field is
      added. Therefore, instead of having three arrays to allocate/free, we
      have a single one, which also improve data locality, reducing the
      impact on the CPU cache.
      
      Fixes: 71ce391d ("net: mvpp2: enable proper per-CPU TX buffers unmapping")
      Reported-by: NRaphael G <raphael.glon@corp.ovh.com>
      Cc: Raphael G <raphael.glon@corp.ovh.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      8354491c
  8. 26 11月, 2016 1 次提交
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      mvpp2: use correct size for memset · e8f967c3
      Arnd Bergmann 提交于
      gcc-7 detects a short memset in mvpp2, introduced in the original
      merge of the driver:
      
      drivers/net/ethernet/marvell/mvpp2.c: In function 'mvpp2_cls_init':
      drivers/net/ethernet/marvell/mvpp2.c:3296:2: error: 'memset' used with length equal to number of elements without multiplication by element size [-Werror=memset-elt-size]
      
      The result seems to be that we write uninitialized data into the
      flow table registers, although we did not get any warning about
      that uninitialized data usage.
      
      Using sizeof() lets us initialize then entire array instead.
      
      Fixes: 3f518509 ("ethernet: Add new driver for Marvell Armada 375 network unit")
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      e8f967c3
  9. 17 11月, 2016 1 次提交
  10. 18 10月, 2016 1 次提交
    • J
      ethernet/marvell: use core min/max MTU checking · 5777987e
      Jarod Wilson 提交于
      mvneta: min_mtu 68, max_mtu 9676
      - mtu validation routine mostly did range check, merge back into
        mvneta_change_mtu for simplicity
      
      mvpp2: min_mtu 68, max_mtu 9676
      - mtu validation routine mostly did range check, merge back into
        mvpp2_change_mtu for simplicity
      
      pxa168_eth: min_mtu 68, max_mtu 9500
      
      skge: min_mtu 60, max_mtu 9000
      
      sky2: min_mtu 68, max_mtu 1500 or 9000, depending on hw
      
      CC: netdev@vger.kernel.org
      CC: Mirko Lindner <mlindner@marvell.com>
      CC: Stephen Hemminger <stephen@networkplumber.org>
      CC: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
      Signed-off-by: NJarod Wilson <jarod@redhat.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      5777987e
  11. 02 8月, 2016 1 次提交
  12. 29 6月, 2016 2 次提交
  13. 02 4月, 2016 2 次提交
  14. 01 4月, 2016 1 次提交
  15. 13 2月, 2016 1 次提交
    • A
      net: mvpp2: Return correct error codes · c2bb7bc5
      Amitoj Kaur Chawla 提交于
      The return value of kzalloc on failure of allocation of memory should
      be -ENOMEM and not -1.
      
      Found using Coccinelle. A simplified version of the semantic patch
      used is:
      
      //<smpl>
      @@
      expression *e;
      position p,q;
      @@
      
      e@q = kzalloc(...);
      if@p (e == NULL) {
      ...
      return
      - -1
      + -ENOMEM
      ;
      }
      //</smpl>
      
      This function may also return -1 after calling mpp2_prs_tcam_port_map_get.
      So that the function consistently returns meaningful error values on
      failure, the -1 is changed to -EINVAL.
      Signed-off-by: NAmitoj Kaur Chawla <amitoj1606@gmail.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      c2bb7bc5
  16. 05 12月, 2015 3 次提交
  17. 11 8月, 2015 1 次提交
    • M
      net: mvpp2: replace TX coalescing interrupts with hrtimer · edc660fa
      Marcin Wojtas 提交于
      The PP2 controller is capable of per-CPU TX processing, which means there are
      per-CPU banked register sets and queues. Current version of the driver supports
      TX packet coalescing - once on given CPU sent packets amount reaches a threshold
      value, an IRQ occurs. However, there is a single interrupt line responsible for
      CPU0/1 TX and RX events (the latter is not per-CPU, the hardware does not
      support RSS).
      
      When the top-half executes the interrupt cause is not known. This is why in
      NAPI poll function, along with RX processing, IRQ cause register on both
      CPU's is accessed in order to determine on which of them the TX coalescing
      threshold might have been reached. Thus the egress processing and releasing the
      buffers is able to take place on the corresponding CPU. Hitherto approach lead
      to an illegal usage of on_each_cpu function in softirq context.
      
      The problem is solved by resigning from TX coalescing interrupts and separating
      egress finalization from NAPI processing. For that purpose a method of using
      hrtimer is introduced. In main transmit function (mvpp2_tx) buffers are released
      once a software coalescing threshold is reached. In case not all the data is
      processed a timer is set on this CPU - in its interrupt context a tasklet is
      scheduled in which all queues are processed. At once only one timer per-CPU can
      be running, which is controlled by a dedicated flag.
      
      This commit removes TX processing from NAPI polling function, disables hardware
      coalescing and enables hrtimer with tasklet, using new per-CPU port structure
      (mvpp2_port_pcpu).
      Signed-off-by: NMarcin Wojtas <mw@semihalf.com>
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      edc660fa