1. 15 4月, 2013 1 次提交
    • D
      ARM: socfpga: Add clock entries into device tree · 042000b0
      Dinh Nguyen 提交于
      Adds the main PLL clock groups for SOCFPGA into device tree file
      so that the clock framework to query the clock and clock rates
      appropriately.
      
      $cat /sys/kernel/debug/clk/clk_summary
         clock                        enable_cnt  prepare_cnt  rate
      ---------------------------------------------------------------------
       osc1                           2           2            25000000
          sdram_pll                   0           0            400000000
             s2f_usr2_clk             0           0            66666666
             ddr_dq_clk               0           0            200000000
             ddr_2x_dqs_clk           0           0            400000000
             ddr_dqs_clk              0           0            200000000
          periph_pll                  2           2            500000000
             s2f_usr1_clk             0           0            50000000
             per_base_clk             4           4            100000000
             per_nand_mmc_clk         0           0            25000000
             per_qsi_clk              0           0            250000000
             emac1_clk                1           1            125000000
             emac0_clk                0           0            125000000
          main_pll                    1           1            1600000000
             cfg_s2f_usr0_clk         0           0            100000000
             main_nand_sdmmc_clk      0           0            100000000
             main_qspi_clk            0           0            400000000
             dbg_base_clk             0           0            400000000
             mainclk                  0           0            400000000
             mpuclk                   1           1            800000000
                smp_twd               1           1            200000000
      Signed-off-by: NDinh Nguyen <dinguyen@altera.com>
      Reviewed-by: NPavel Machek <pavel@denx.de>
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      042000b0
  2. 04 4月, 2013 3 次提交
  3. 03 4月, 2013 1 次提交
    • C
      ARM: bcm281xx: Add timer driver (DT portion) · 5f03dc20
      Christian Daudt 提交于
      This adds support for the Broadcom timer, used in the following SoCs:
      BCM11130, BCM11140, BCM11351, BCM28145, BCM28155
      
      Updates from V6:
      - Split DT portion into a separate patch
      
      Updates from V5:
      - Rebase to latest arm-soc/for-next
      
      Updates from V4:
      - Switch code to use CLOCKSOURCE_OF_DECLARE
      
      Updates from V3:
      - Migrate to 3.9 timer framework updates
      
      Updates from V2:
      - prepend static fns + fields with kona_
      
      Updates from V1:
      - Rename bcm_timer.c to bcm_kona_timer.c
      - Pull .h into bcm_kona_timer.c
      - Make timers static
      - Clean up comment block
      - Switched to using clockevents_config_and_register
      - Added an error to the get_timer loop if it repeats too much
      - Added to Documentation/devicetree/bindings/arm/bcm/bcm,kona-timer.txt
      - Added missing readl to timer_disable_and_clear
      
      Note: bcm,kona-timer was kept as the 'compatible' field to make it
      specific enough for when there are multiple bcm timers (bcm,timer is
      too generic).
      Signed-off-by: NChristian Daudt <csd@broadcom.com>
      Acked-by: NArnd Bergmann <arnd@arndb.de>
      Acked-by: NJohn Stultz <john.stultz@linaro.org>
      Reviewed-by: NStephen Warren <swarren@nvidia.com>
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      5f03dc20
  4. 12 3月, 2013 2 次提交
  5. 03 3月, 2013 1 次提交
    • J
      metag: Internal and external irqchips · 5698c50d
      James Hogan 提交于
      Meta core internal interrupts (from HWSTATMETA and friends) are vectored
      onto the TR1 core trigger for the current thread. This is demultiplexed
      in irq-metag.c to individual Linux IRQs for each internal interrupt.
      
      External SoC interrupts (from HWSTATEXT and friends) are vectored onto
      the TR2 core trigger for the current thread. This is demultiplexed in
      irq-metag-ext.c to individual Linux IRQs for each external SoC interrupt.
      The external irqchip has devicetree bindings for configuring the number
      of irq banks and the type of masking available.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Grant Likely <grant.likely@secretlab.ca>
      Cc: Rob Herring <rob.herring@calxeda.com>
      Cc: Rob Landley <rob@landley.net>
      Cc: Dom Cobley <popcornmix@gmail.com>
      Cc: Simon Arlott <simon@fire.lp0.eu>
      Cc: Viresh Kumar <viresh.kumar@linaro.org>
      Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
      Cc: devicetree-discuss@lists.ozlabs.org
      Cc: linux-doc@vger.kernel.org
      5698c50d
  6. 01 3月, 2013 4 次提交
  7. 28 2月, 2013 1 次提交
    • A
      dmaengine: dw_dmac: move to generic DMA binding · f9c6a655
      Arnd Bergmann 提交于
      The original device tree binding for this driver, from Viresh Kumar
      unfortunately conflicted with the generic DMA binding, and did not allow
      to completely seperate slave device configuration from the controller.
      
      This is an attempt to replace it with an implementation of the generic
      binding, but it is currently completely untested, because I do not have
      any hardware with this particular controller.
      
      The patch applies on top of the slave-dma tree, which contains both the base
      support for the generic DMA binding, as well as the earlier attempt from
      Viresh. Both of these are currently not merged upstream however.
      
      This version incorporates feedback from Viresh Kumar, Andy Shevchenko
      and Russell King.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
      Acked-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
      Cc: Vinod Koul <vinod.koul@linux.intel.com>
      Cc: devicetree-discuss@lists.ozlabs.org
      Cc: linux-arm-kernel@lists.infradead.org
      Signed-off-by: NVinod Koul <vinod.koul@intel.com>
      f9c6a655
  8. 25 2月, 2013 6 次提交
  9. 22 2月, 2013 1 次提交
  10. 20 2月, 2013 3 次提交
    • R
      drm/tilcdc: add support for LCD panels (v5) · 0d4bbaf9
      Rob Clark 提交于
      Add an output panel driver for LCD panels.  Tested with LCD3 cape on
      beaglebone.
      
      v1: original
      v2: s/of_find_node_by_name()/of_get_child_by_name()/ from Pantelis
          Antoniou
      v3: add backlight support
      v4: rebase to latest of video timing helpers
      v5: remove some unneeded fields from panel-info struct, add DT bindings
          docs
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      Tested-by: NKoen Kooi <koen@dominion.thruhere.net>
      0d4bbaf9
    • R
      drm/tilcdc: add encoder slave (v2) · 6e8de0bd
      Rob Clark 提交于
      Add output panel driver for i2c encoder slaves.
      
      v1: original
      v2: add DT bindings docs, and minor updates for review comments
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      Reviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      Tested-by: NKoen Kooi <koen@dominion.thruhere.net>
      6e8de0bd
    • R
      drm/tilcdc: add TI LCD Controller DRM driver (v4) · 16ea975e
      Rob Clark 提交于
      A simple DRM/KMS driver for the TI LCD Controller found in various
      smaller TI parts (AM33xx, OMAPL138, etc).  This driver uses the
      CMA helpers.  Currently only the TFP410 DVI encoder is supported
      (tested with beaglebone + DVI cape).  There are also various LCD
      displays, for which support can be added (as I get hw to test on),
      and an external i2c HDMI encoder found on some boards.
      
      The display controller supports a single CRTC.  And the encoder+
      connector are split out into sub-devices.  Depending on which LCD
      or external encoder is actually present, the appropriate output
      module(s) will be loaded.
      
      v1: original
      v2: fix fb refcnting and few other cleanups
      v3: get +/- vsync/hsync from timings rather than panel-info, add
          option DT max-bandwidth field so driver doesn't attempt to
          pick a display mode with too high memory bandwidth, and other
          small cleanups
      v4: remove some unneeded stuff from panel-info struct, properly
          set high bits for hfp/hsw/hbp for rev 2, add DT bindings docs
      Signed-off-by: NRob Clark <robdclark@gmail.com>
      Reviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      Tested-by: NKoen Kooi <koen@dominion.thruhere.net>
      16ea975e
  11. 17 2月, 2013 2 次提交
  12. 16 2月, 2013 2 次提交
  13. 14 2月, 2013 5 次提交
  14. 13 2月, 2013 3 次提交
  15. 12 2月, 2013 4 次提交
  16. 10 2月, 2013 1 次提交