1. 14 5月, 2020 1 次提交
  2. 31 3月, 2020 1 次提交
  3. 17 3月, 2020 3 次提交
  4. 05 2月, 2020 2 次提交
  5. 28 1月, 2020 5 次提交
  6. 24 1月, 2020 5 次提交
  7. 05 8月, 2019 1 次提交
  8. 05 6月, 2019 1 次提交
    • S
      KVM: Directly return result from kvm_arch_check_processor_compat() · f257d6dc
      Sean Christopherson 提交于
      Add a wrapper to invoke kvm_arch_check_processor_compat() so that the
      boilerplate ugliness of checking virtualization support on all CPUs is
      hidden from the arch specific code.  x86's implementation in particular
      is quite heinous, as it unnecessarily propagates the out-param pattern
      into kvm_x86_ops.
      
      While the x86 specific issue could be resolved solely by changing
      kvm_x86_ops, make the change for all architectures as returning a value
      directly is prettier and technically more robust, e.g. s390 doesn't set
      the out param, which could lead to subtle breakage in the (highly
      unlikely) scenario where the out-param was not pre-initialized by the
      caller.
      
      Opportunistically annotate svm_check_processor_compat() with __init.
      Signed-off-by: NSean Christopherson <sean.j.christopherson@intel.com>
      Reviewed-by: NCornelia Huck <cohuck@redhat.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      f257d6dc
  9. 28 5月, 2019 1 次提交
    • T
      KVM: s390: Do not report unusabled IDs via KVM_CAP_MAX_VCPU_ID · a86cb413
      Thomas Huth 提交于
      KVM_CAP_MAX_VCPU_ID is currently always reporting KVM_MAX_VCPU_ID on all
      architectures. However, on s390x, the amount of usable CPUs is determined
      during runtime - it is depending on the features of the machine the code
      is running on. Since we are using the vcpu_id as an index into the SCA
      structures that are defined by the hardware (see e.g. the sca_add_vcpu()
      function), it is not only the amount of CPUs that is limited by the hard-
      ware, but also the range of IDs that we can use.
      Thus KVM_CAP_MAX_VCPU_ID must be determined during runtime on s390x, too.
      So the handling of KVM_CAP_MAX_VCPU_ID has to be moved from the common
      code into the architecture specific code, and on s390x we have to return
      the same value here as for KVM_CAP_MAX_VCPUS.
      This problem has been discovered with the kvm_create_max_vcpus selftest.
      With this change applied, the selftest now passes on s390x, too.
      Reviewed-by: NAndrew Jones <drjones@redhat.com>
      Reviewed-by: NCornelia Huck <cohuck@redhat.com>
      Reviewed-by: NDavid Hildenbrand <david@redhat.com>
      Signed-off-by: NThomas Huth <thuth@redhat.com>
      Message-Id: <20190523164309.13345-9-thuth@redhat.com>
      Cc: stable@vger.kernel.org
      Signed-off-by: NChristian Borntraeger <borntraeger@de.ibm.com>
      a86cb413
  10. 05 2月, 2019 1 次提交
    • P
      MIPS: MemoryMapID (MMID) Support · c8790d65
      Paul Burton 提交于
      Introduce support for using MemoryMapIDs (MMIDs) as an alternative to
      Address Space IDs (ASIDs). The major difference between the two is that
      MMIDs are global - ie. an MMID uniquely identifies an address space
      across all coherent CPUs. In contrast ASIDs are non-global per-CPU IDs,
      wherein each address space is allocated a separate ASID for each CPU
      upon which it is used. This global namespace allows a new GINVT
      instruction be used to globally invalidate TLB entries associated with a
      particular MMID across all coherent CPUs in the system, removing the
      need for IPIs to invalidate entries with separate ASIDs on each CPU.
      
      The allocation scheme used here is largely borrowed from arm64 (see
      arch/arm64/mm/context.c). In essence we maintain a bitmap to track
      available MMIDs, and MMIDs in active use at the time of a rollover to a
      new MMID version are preserved in the new version. The allocation scheme
      requires efficient 64 bit atomics in order to perform reasonably, so
      this support depends upon CONFIG_GENERIC_ATOMIC64=n (ie. currently it
      will only be included in MIPS64 kernels).
      
      The first, and currently only, available CPU with support for MMIDs is
      the MIPS I6500. This CPU supports 16 bit MMIDs, and so for now we cap
      our MMIDs to 16 bits wide in order to prevent the bitmap growing to
      absurd sizes if any future CPU does implement 32 bit MMIDs as the
      architecture manuals suggest is recommended.
      
      When MMIDs are in use we also make use of GINVT instruction which is
      available due to the global nature of MMIDs. By executing a sequence of
      GINVT & SYNC 0x14 instructions we can avoid the overhead of an IPI to
      each remote CPU in many cases. One complication is that GINVT will
      invalidate wired entries (in all cases apart from type 0, which targets
      the entire TLB). In order to avoid GINVT invalidating any wired TLB
      entries we set up, we make sure to create those entries using a reserved
      MMID (0) that we never associate with any address space.
      
      Also of note is that KVM will require further work in order to support
      MMIDs & GINVT, since KVM is involved in allocating IDs for guests & in
      configuring the MMU. That work is not part of this patch, so for now
      when MMIDs are in use KVM is disabled.
      Signed-off-by: NPaul Burton <paul.burton@mips.com>
      Cc: linux-mips@vger.kernel.org
      c8790d65
  11. 14 12月, 2018 2 次提交
    • P
      kvm: introduce manual dirty log reprotect · 2a31b9db
      Paolo Bonzini 提交于
      There are two problems with KVM_GET_DIRTY_LOG.  First, and less important,
      it can take kvm->mmu_lock for an extended period of time.  Second, its user
      can actually see many false positives in some cases.  The latter is due
      to a benign race like this:
      
        1. KVM_GET_DIRTY_LOG returns a set of dirty pages and write protects
           them.
        2. The guest modifies the pages, causing them to be marked ditry.
        3. Userspace actually copies the pages.
        4. KVM_GET_DIRTY_LOG returns those pages as dirty again, even though
           they were not written to since (3).
      
      This is especially a problem for large guests, where the time between
      (1) and (3) can be substantial.  This patch introduces a new
      capability which, when enabled, makes KVM_GET_DIRTY_LOG not
      write-protect the pages it returns.  Instead, userspace has to
      explicitly clear the dirty log bits just before using the content
      of the page.  The new KVM_CLEAR_DIRTY_LOG ioctl can also operate on a
      64-page granularity rather than requiring to sync a full memslot;
      this way, the mmu_lock is taken for small amounts of time, and
      only a small amount of time will pass between write protection
      of pages and the sending of their content.
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      2a31b9db
    • P
      kvm: rename last argument to kvm_get_dirty_log_protect · 8fe65a82
      Paolo Bonzini 提交于
      When manual dirty log reprotect will be enabled, kvm_get_dirty_log_protect's
      pointer argument will always be false on exit, because no TLB flush is needed
      until the manual re-protection operation.  Rename it from "is_dirty" to "flush",
      which more accurately tells the caller what they have to do with it.
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      8fe65a82
  12. 31 10月, 2018 1 次提交
  13. 20 6月, 2018 1 次提交
  14. 02 6月, 2018 1 次提交
  15. 15 5月, 2018 1 次提交
  16. 14 12月, 2017 5 次提交
  17. 28 11月, 2017 1 次提交
    • J
      KVM: Let KVM_SET_SIGNAL_MASK work as advertised · 20b7035c
      Jan H. Schönherr 提交于
      KVM API says for the signal mask you set via KVM_SET_SIGNAL_MASK, that
      "any unblocked signal received [...] will cause KVM_RUN to return with
      -EINTR" and that "the signal will only be delivered if not blocked by
      the original signal mask".
      
      This, however, is only true, when the calling task has a signal handler
      registered for a signal. If not, signal evaluation is short-circuited for
      SIG_IGN and SIG_DFL, and the signal is either ignored without KVM_RUN
      returning or the whole process is terminated.
      
      Make KVM_SET_SIGNAL_MASK behave as advertised by utilizing logic similar
      to that in do_sigtimedwait() to avoid short-circuiting of signals.
      Signed-off-by: NJan H. Schönherr <jschoenh@amazon.de>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      20b7035c
  18. 15 9月, 2017 1 次提交
  19. 08 8月, 2017 1 次提交
    • L
      KVM: add spinlock optimization framework · 199b5763
      Longpeng(Mike) 提交于
      If a vcpu exits due to request a user mode spinlock, then
      the spinlock-holder may be preempted in user mode or kernel mode.
      (Note that not all architectures trap spin loops in user mode,
      only AMD x86 and ARM/ARM64 currently do).
      
      But if a vcpu exits in kernel mode, then the holder must be
      preempted in kernel mode, so we should choose a vcpu in kernel mode
      as a more likely candidate for the lock holder.
      
      This introduces kvm_arch_vcpu_in_kernel() to decide whether the
      vcpu is in kernel-mode when it's preempted.  kvm_vcpu_on_spin's
      new argument says the same of the spinning VCPU.
      Signed-off-by: NLongpeng(Mike) <longpeng2@huawei.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      199b5763
  20. 07 4月, 2017 1 次提交
  21. 28 3月, 2017 4 次提交
    • J
      KVM: MIPS/VZ: Trace guest mode changes · edec9d7b
      James Hogan 提交于
      Create a trace event for guest mode changes, and enable VZ's
      GuestCtl0.MC bit after the trace event is enabled to trap all guest mode
      changes.
      
      The MC bit causes Guest Hardware Field Change (GHFC) exceptions whenever
      a guest mode change occurs (such as an exception entry or return from
      exception), so we need to handle this exception now. The MC bit is only
      enabled when restoring register state, so enabling the trace event won't
      take immediate effect.
      
      Tracing guest mode changes can be particularly handy when trying to work
      out what a guest OS gets up to before something goes wrong, especially
      if the problem occurs as a result of some previous guest userland
      exception which would otherwise be invisible in the trace.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: "Radim Krčmář" <rkrcmar@redhat.com>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      edec9d7b
    • J
      KVM: MIPS/VZ: Support hardware guest timer · f4474d50
      James Hogan 提交于
      Transfer timer state to the VZ guest context (CP0_GTOffset & guest
      CP0_Count) when entering guest mode, enabling direct guest access to it,
      and transfer back to soft timer when saving guest register state.
      
      This usually allows guest code to directly read CP0_Count (via MFC0 and
      RDHWR) and read/write CP0_Compare, without trapping to the hypervisor
      for it to emulate the guest timer. Writing to CP0_Count or CP0_Cause.DC
      is much less common and still triggers a hypervisor GPSI exception, in
      which case the timer state is transferred back to an hrtimer before
      emulating the write.
      
      We are careful to prevent small amounts of drift from building up due to
      undeterministic time intervals between reading of the ktime and reading
      of CP0_Count. Some drift is expected however, since the system
      clocksource may use a different timer to the local CP0_Count timer used
      by VZ. This is permitted to prevent guest CP0_Count from appearing to go
      backwards.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: "Radim Krčmář" <rkrcmar@redhat.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      f4474d50
    • J
      KVM: MIPS: Implement VZ support · c992a4f6
      James Hogan 提交于
      Add the main support for the MIPS Virtualization ASE (A.K.A. VZ) to MIPS
      KVM. The bulk of this work is in vz.c, with various new state and
      definitions elsewhere.
      
      Enough is implemented to be able to run on a minimal VZ core. Further
      patches will fill out support for guest features which are optional or
      can be disabled.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Acked-by: NRalf Baechle <ralf@linux-mips.org>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: "Radim Krčmář" <rkrcmar@redhat.com>
      Cc: Steven Rostedt <rostedt@goodmis.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Jonathan Corbet <corbet@lwn.net>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      Cc: linux-doc@vger.kernel.org
      c992a4f6
    • J
      KVM: MIPS: Update exit handler for VZ · ea1bdbf6
      James Hogan 提交于
      The general guest exit handler needs a few tweaks for VZ compared to
      trap & emulate, which for now are made directly depending on
      CONFIG_KVM_MIPS_VZ:
      
      - There is no need to re-enable the hardware page table walker (HTW), as
        it can be left enabled during guest mode operation with VZ.
      
      - There is no need to perform a privilege check, as any guest privilege
        violations should have already been detected by the hardware and
        triggered the appropriate guest exception.
      Signed-off-by: NJames Hogan <james.hogan@imgtec.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: "Radim Krčmář" <rkrcmar@redhat.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: linux-mips@linux-mips.org
      Cc: kvm@vger.kernel.org
      ea1bdbf6