1. 28 1月, 2018 1 次提交
    • M
      powerpc/cell: Remove axonram driver · 1d65b1c8
      Michael Ellerman 提交于
      The QS21/22 IBM Cell blades had a southbridge chip called Axon. This
      could have DDR DIMMs attached to it, though they were not directly
      usable as RAM, instead they could be used as some sort of buffer, if
      applications were written specifically to use the block device
      provided by the driver.
      
      Although the driver supposedly had direct access support, it was
      apparently never tested (see commit 91117a20 ("axonram: Fix bug in
      direct_access")).
      
      These machines have not been available for over 5 years, and were
      never widely in use. It seems highly unlikely anyone is using this
      driver.
      
      In general we're happy to leave old drivers in the tree, but because
      DAX is involved this driver is caught up in the ongoing work in that
      area, but none of the DAX folks are able to test it.
      
      So remove the driver, if any one *is* using it, we'll be happy to put
      it back.
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      1d65b1c8
  2. 27 1月, 2018 8 次提交
  3. 24 1月, 2018 7 次提交
  4. 22 1月, 2018 3 次提交
    • N
      powerpc/pseries, ps3: panic flush kernel messages before halting system · 35adacd6
      Nicholas Piggin 提交于
      Platforms with a panic handler that halts the system can have problems
      getting kernel messages out, because the panic notifiers are called
      before kernel/panic.c does its flushing of printk buffers an console
      etc.
      
      This was attempted to be solved with commit a3b2cb30 ("powerpc: Do
      not call ppc_md.panic in fadump panic notifier"), but that wasn't the
      right approach and caused other problems, and was reverted by commit
      ab9dbf77.
      
      Instead, the powernv shutdown paths have already had a similar
      problem, fixed by taking the message flushing sequence from
      kernel/panic.c. That's a little bit ugly, but while we have the code
      duplicated, it will work for this case as well. So have ppc panic
      handlers do the same flushing before they terminate.
      
      Without this patch, a qemu pseries_le_defconfig guest stops silently
      when issued the nmi command when xmon is off and no crash dumpers
      enabled. Afterwards, an oops is printed by each CPU as expected.
      
      Fixes: ab9dbf77 ("Revert "powerpc: Do not call ppc_md.panic in fadump panic notifier"")
      Signed-off-by: NNicholas Piggin <npiggin@gmail.com>
      Reviewed-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      35adacd6
    • G
      powerpc/powernv: Add ppc_pci_reset_phbs parameter to issue a PHB reset · 45baee14
      Guilherme G. Piccoli 提交于
      During a kdump kernel boot in PowerPC, we request a reset of the PHBs
      to the FW. It makes sense, since if we are booting a kdump kernel it
      means we had some trouble before and we cannot rely in the adapters'
      health; they could be in a bad state, hence the reset is needed.
      
      But this reset is useful not only in kdump - there are situations,
      specially when debugging drivers, that we could break an adapter in
      a way it requires such reset. One can tell to just go ahead and
      reboot the machine, but happens that many times doing kexec is much
      faster, and so preferable than a full power cycle.
      
      This patch adds the ppc_pci_reset_phbs parameter to perform such reset.
      Signed-off-by: NGuilherme G. Piccoli <gpiccoli@linux.vnet.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      45baee14
    • R
      powerpc: Use octal numbers for file permissions · 57ad583f
      Russell Currey 提交于
      Symbolic macros are unintuitive and hard to read, whereas octal constants
      are much easier to interpret.  Replace macros for the basic permission
      flags (user/group/other read/write/execute) with numeric constants
      instead, across the whole powerpc tree.
      
      Introducing a significant number of changes across the tree for no runtime
      benefit isn't exactly desirable, but so long as these macros are still
      used in the tree people will keep sending patches that add them.  Not only
      are they hard to parse at a glance, there are multiple ways of coming to
      the same value (as you can see with 0444 and 0644 in this patch) which
      hurts readability.
      Signed-off-by: NRussell Currey <ruscur@russell.cc>
      Reviewed-by: NCyril Bur <cyrilbur@gmail.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      57ad583f
  5. 21 1月, 2018 4 次提交
  6. 20 1月, 2018 1 次提交
  7. 19 1月, 2018 1 次提交
    • A
      powerpc/powernv: Add debugfs interface for imc-mode and imc-command · 684d9840
      Anju T Sudhakar 提交于
      In memory Collection (IMC) counter pmu driver controls the ucode's
      execution state. At the system boot, IMC perf driver pause the ucode.
      Ucode state is changed to "running" only when any of the nest units
      are monitored or profiled using perf tool.
      
      Nest units support only limited set of hardware counters and ucode is
      always programmed in the "production mode" ("accumulation") mode. This
      mode is configured to provide key performance metric data for most of
      the nest units.
      
      But ucode also supports other modes which would be used for "debug" to
      drill down specific nest units. That is, ucode when switched to
      "powerbus" debug mode (for example), will dynamically reconfigure the
      nest counters to target only "powerbus" related events in the hardware
      counters. This allows the IMC nest unit to focus on powerbus related
      transactions in the system in more detail. At this point, production
      mode events may or may not be counted.
      
      IMC nest counters has both in-band (ucode access) and out of band
      access to it. Since not all nest counter configurations are supported
      by ucode, out of band tools are used to characterize other nest
      counter configurations.
      
      Patch provides an interface via "debugfs" to enable the switching of
      ucode modes in the system. To switch ucode mode, one has to first
      pause the microcode (imc_cmd), and then write the target mode value to
      the "imc_mode" file.
      
      Proposed Approach:
      
      In the proposed approach, the function (export_imc_mode_and_cmd) which
      creates the debugfs interface for imc mode and command is implemented
      in opal-imc.c. Thus we can use imc_get_mem_addr() to get the homer
      base address for each chip.
      
      The interface to expose imc mode and command is required only if we
      have nest pmu units registered. Employing the existing data structures
      to track whether we have any nest units registered will require to
      extend data from perf side to opal-imc.c. Instead an integer is
      introduced to hold that information by counting successful nest unit
      registration. Debugfs interface is removed based on the integer count.
      
      Example for the interface:
      
        $ ls /sys/kernel/debug/imc
        imc_cmd_0  imc_cmd_8  imc_mode_0  imc_mode_8
      Signed-off-by: NAnju T Sudhakar <anju@linux.vnet.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      684d9840
  8. 16 1月, 2018 8 次提交
  9. 10 1月, 2018 3 次提交
  10. 08 1月, 2018 1 次提交
    • M
      powerpc/pseries: Make RAS IRQ explicitly dependent on DLPAR WQ · e2d59152
      Michael Ellerman 提交于
      The hotplug code uses its own workqueue to handle IRQ requests
      (pseries_hp_wq), however that workqueue is initialized after
      init_ras_IRQ(). That can lead to a kernel panic if any hotplug
      interrupts fire after init_ras_IRQ() but before pseries_hp_wq is
      initialised. eg:
      
        UDP-Lite hash table entries: 2048 (order: 0, 65536 bytes)
        NET: Registered protocol family 1
        Unpacking initramfs...
        (qemu) object_add memory-backend-ram,id=mem1,size=10G
        (qemu) device_add pc-dimm,id=dimm1,memdev=mem1
        Unable to handle kernel paging request for data at address 0xf94d03007c421378
        Faulting instruction address: 0xc00000000012d744
        Oops: Kernel access of bad area, sig: 11 [#1]
        LE SMP NR_CPUS=2048 NUMA pSeries
        Modules linked in:
        CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.15.0-rc2-ziviani+ #26
        task:         (ptrval) task.stack:         (ptrval)
        NIP:  c00000000012d744 LR: c00000000012d744 CTR: 0000000000000000
        REGS:         (ptrval) TRAP: 0380   Not tainted  (4.15.0-rc2-ziviani+)
        MSR:  8000000000009033 <SF,EE,ME,IR,DR,RI,LE>  CR: 28088042  XER: 20040000
        CFAR: c00000000012d3c4 SOFTE: 0
        ...
        NIP [c00000000012d744] __queue_work+0xd4/0x5c0
        LR [c00000000012d744] __queue_work+0xd4/0x5c0
        Call Trace:
        [c0000000fffefb90] [c00000000012d744] __queue_work+0xd4/0x5c0 (unreliable)
        [c0000000fffefc70] [c00000000012dce4] queue_work_on+0xb4/0xf0
      
      This commit makes the RAS IRQ registration explicitly dependent on the
      creation of the pseries_hp_wq.
      Reported-by: NMin Deng <mdeng@redhat.com>
      Reported-by: NDaniel Henrique Barboza <danielhb@linux.vnet.ibm.com>
      Tested-by: NJose Ricardo Ziviani <joserz@linux.vnet.ibm.com>
      Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>
      Reviewed-by: NDavid Gibson <david@gibson.dropbear.id.au>
      e2d59152
  11. 11 12月, 2017 3 次提交