1. 20 12月, 2019 1 次提交
  2. 18 11月, 2019 1 次提交
    • C
      riscv: add nommu support · 6bd33e1e
      Christoph Hellwig 提交于
      The kernel runs in M-mode without using page tables, and thus can't run
      bare metal without help from additional firmware.
      
      Most of the patch is just stubbing out code not needed without page
      tables, but there is an interesting detail in the signals implementation:
      
       - The normal RISC-V syscall ABI only implements rt_sigreturn as VDSO
         entry point, but the ELF VDSO is not supported for nommu Linux.
         We instead copy the code to call the syscall onto the stack.
      
      In addition to enabling the nommu code a new defconfig for a small
      kernel image that can run in nommu mode on qemu is also provided, to run
      a kernel in qemu you can use the following command line:
      
      qemu-system-riscv64 -smp 2 -m 64 -machine virt -nographic \
      	-kernel arch/riscv/boot/loader \
      	-drive file=rootfs.ext2,format=raw,id=hd0 \
      	-device virtio-blk-device,drive=hd0
      
      Contains contributions from Damien Le Moal <Damien.LeMoal@wdc.com>.
      Signed-off-by: NChristoph Hellwig <hch@lst.de>
      Reviewed-by: NAnup Patel <anup@brainfault.org>
      [paul.walmsley@sifive.com: updated to apply; add CONFIG_MMU guards
       around PCI_IOBASE definition to fix build issues; fixed checkpatch
       issues; move the PCI_IO_* and VMEMMAP address space macros along
       with the others; resolve sparse warning]
      Signed-off-by: NPaul Walmsley <paul.walmsley@sifive.com>
      6bd33e1e
  3. 17 11月, 2019 1 次提交
    • A
      int128: move __uint128_t compiler test to Kconfig · c12d3362
      Ard Biesheuvel 提交于
      In order to use 128-bit integer arithmetic in C code, the architecture
      needs to have declared support for it by setting ARCH_SUPPORTS_INT128,
      and it requires a version of the toolchain that supports this at build
      time. This is why all existing tests for ARCH_SUPPORTS_INT128 also test
      whether __SIZEOF_INT128__ is defined, since this is only the case for
      compilers that can support 128-bit integers.
      
      Let's fold this additional test into the Kconfig declaration of
      ARCH_SUPPORTS_INT128 so that we can also use the symbol in Makefiles,
      e.g., to decide whether a certain object needs to be included in the
      first place.
      
      Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
      Signed-off-by: NArd Biesheuvel <ardb@kernel.org>
      Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
      c12d3362
  4. 14 11月, 2019 1 次提交
  5. 12 11月, 2019 1 次提交
  6. 06 11月, 2019 1 次提交
    • C
      riscv: abstract out CSR names for supervisor vs machine mode · a4c3733d
      Christoph Hellwig 提交于
      Many of the privileged CSRs exist in a supervisor and machine version
      that are used very similarly.  Provide versions of the CSR names and
      fields that map to either the S-mode or M-mode variant depending on
      a new CONFIG_RISCV_M_MODE kconfig symbol.
      
      Contains contributions from Damien Le Moal <Damien.LeMoal@wdc.com>
      and Paul Walmsley <paul.walmsley@sifive.com>.
      Signed-off-by: NChristoph Hellwig <hch@lst.de>
      Acked-by: Thomas Gleixner <tglx@linutronix.de> # for drivers/clocksource, drivers/irqchip
      [paul.walmsley@sifive.com: updated to apply]
      Signed-off-by: NPaul Walmsley <paul.walmsley@sifive.com>
      a4c3733d
  7. 30 10月, 2019 1 次提交
  8. 25 9月, 2019 1 次提交
    • A
      riscv: make mmap allocation top-down by default · 54c95a11
      Alexandre Ghiti 提交于
      In order to avoid wasting user address space by using bottom-up mmap
      allocation scheme, prefer top-down scheme when possible.
      
      Before:
      root@qemuriscv64:~# cat /proc/self/maps
      00010000-00016000 r-xp 00000000 fe:00 6389       /bin/cat.coreutils
      00016000-00017000 r--p 00005000 fe:00 6389       /bin/cat.coreutils
      00017000-00018000 rw-p 00006000 fe:00 6389       /bin/cat.coreutils
      00018000-00039000 rw-p 00000000 00:00 0          [heap]
      1555556000-155556d000 r-xp 00000000 fe:00 7193   /lib/ld-2.28.so
      155556d000-155556e000 r--p 00016000 fe:00 7193   /lib/ld-2.28.so
      155556e000-155556f000 rw-p 00017000 fe:00 7193   /lib/ld-2.28.so
      155556f000-1555570000 rw-p 00000000 00:00 0
      1555570000-1555572000 r-xp 00000000 00:00 0      [vdso]
      1555574000-1555576000 rw-p 00000000 00:00 0
      1555576000-1555674000 r-xp 00000000 fe:00 7187   /lib/libc-2.28.so
      1555674000-1555678000 r--p 000fd000 fe:00 7187   /lib/libc-2.28.so
      1555678000-155567a000 rw-p 00101000 fe:00 7187   /lib/libc-2.28.so
      155567a000-15556a0000 rw-p 00000000 00:00 0
      3fffb90000-3fffbb1000 rw-p 00000000 00:00 0      [stack]
      
      After:
      root@qemuriscv64:~# cat /proc/self/maps
      00010000-00016000 r-xp 00000000 fe:00 6389       /bin/cat.coreutils
      00016000-00017000 r--p 00005000 fe:00 6389       /bin/cat.coreutils
      00017000-00018000 rw-p 00006000 fe:00 6389       /bin/cat.coreutils
      2de81000-2dea2000 rw-p 00000000 00:00 0          [heap]
      3ff7eb6000-3ff7ed8000 rw-p 00000000 00:00 0
      3ff7ed8000-3ff7fd6000 r-xp 00000000 fe:00 7187   /lib/libc-2.28.so
      3ff7fd6000-3ff7fda000 r--p 000fd000 fe:00 7187   /lib/libc-2.28.so
      3ff7fda000-3ff7fdc000 rw-p 00101000 fe:00 7187   /lib/libc-2.28.so
      3ff7fdc000-3ff7fe2000 rw-p 00000000 00:00 0
      3ff7fe4000-3ff7fe6000 r-xp 00000000 00:00 0      [vdso]
      3ff7fe6000-3ff7ffd000 r-xp 00000000 fe:00 7193   /lib/ld-2.28.so
      3ff7ffd000-3ff7ffe000 r--p 00016000 fe:00 7193   /lib/ld-2.28.so
      3ff7ffe000-3ff7fff000 rw-p 00017000 fe:00 7193   /lib/ld-2.28.so
      3ff7fff000-3ff8000000 rw-p 00000000 00:00 0
      3fff888000-3fff8a9000 rw-p 00000000 00:00 0      [stack]
      
      [alex@ghiti.fr: v6]
        Link: http://lkml.kernel.org/r/20190808061756.19712-15-alex@ghiti.fr
      Link: http://lkml.kernel.org/r/20190730055113.23635-15-alex@ghiti.frSigned-off-by: NAlexandre Ghiti <alex@ghiti.fr>
      Reviewed-by: NChristoph Hellwig <hch@lst.de>
      Reviewed-by: NKees Cook <keescook@chromium.org>
      Reviewed-by: NLuis Chamberlain <mcgrof@kernel.org>
      Acked-by: Paul Walmsley <paul.walmsley@sifive.com>	[arch/riscv]
      Cc: Albert Ou <aou@eecs.berkeley.edu>
      Cc: Alexander Viro <viro@zeniv.linux.org.uk>
      Cc: Catalin Marinas <catalin.marinas@arm.com>
      Cc: Christoph Hellwig <hch@infradead.org>
      Cc: James Hogan <jhogan@kernel.org>
      Cc: Palmer Dabbelt <palmer@sifive.com>
      Cc: Paul Burton <paul.burton@mips.com>
      Cc: Ralf Baechle <ralf@linux-mips.org>
      Cc: Russell King <linux@armlinux.org.uk>
      Cc: Will Deacon <will.deacon@arm.com>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      54c95a11
  9. 05 9月, 2019 1 次提交
    • M
      riscv: Add support for perf registers sampling · 98a93b0b
      Mao Han 提交于
      This patch implements the perf registers sampling and validation API
      for the riscv arch. The valid registers and their register ID are
      defined in perf_regs.h. Perf tool can backtrace in userspace with
      unwind library and the registers/user stack dump support.
      Signed-off-by: NMao Han <han_mao@c-sky.com>
      Cc: Paul Walmsley <paul.walmsley@sifive.com>
      Cc: Greentime Hu <green.hu@gmail.com>
      Cc: Palmer Dabbelt <palmer@sifive.com>
      Cc: linux-riscv <linux-riscv@lists.infradead.org>
      Cc: Christoph Hellwig <hch@lst.de>
      Cc: Guo Ren <guoren@kernel.org>
      Tested-by: NGreentime Hu <greentime.hu@sifive.com>
      [paul.walmsley@sifive.com: minor patch description fix]
      Signed-off-by: NPaul Walmsley <paul.walmsley@sifive.com>
      98a93b0b
  10. 31 8月, 2019 1 次提交
    • L
      RISC-V: Implement sparsemem · d95f1a54
      Logan Gunthorpe 提交于
      Implement sparsemem support for Risc-v which helps pave the
      way for memory hotplug and eventually P2P support.
      
      Introduce Kconfig options for virtual and physical address bits which
      are used to calculate the size of the vmemmap and set the
      MAX_PHYSMEM_BITS.
      
      The vmemmap is located directly before the VMALLOC region and sized
      such that we can allocate enough pages to populate all the virtual
      address space in the system (similar to the way it's done in arm64).
      
      During initialization, call memblocks_present() and sparse_init(),
      and provide a stub for vmemmap_populate() (all of which is similar to
      arm64).
      
      [greentime.hu@sifive.com: fixed pfn_valid, FIXADDR_TOP and fixed a bug
       rebasing onto v5.3]
      Signed-off-by: NGreentime Hu <greentime.hu@sifive.com>
      Signed-off-by: NLogan Gunthorpe <logang@deltatee.com>
      Reviewed-by: NPalmer Dabbelt <palmer@sifive.com>
      Reviewed-by: NChristoph Hellwig <hch@lst.de>
      Cc: Albert Ou <aou@eecs.berkeley.edu>
      Cc: Andrew Waterman <andrew@sifive.com>
      Cc: Olof Johansson <olof@lixom.net>
      Cc: Michael Clark <michaeljclark@mac.com>
      Cc: Rob Herring <robh@kernel.org>
      Cc: Zong Li <zong@andestech.com>
      Reviewed-by: NMike Rapoport <rppt@linux.ibm.com>
      [paul.walmsley@sifive.com: updated to apply; minor commit message
       reformat]
      Signed-off-by: NPaul Walmsley <paul.walmsley@sifive.com>
      d95f1a54
  11. 22 8月, 2019 1 次提交
  12. 23 7月, 2019 1 次提交
  13. 04 7月, 2019 1 次提交
  14. 02 7月, 2019 1 次提交
  15. 24 6月, 2019 1 次提交
  16. 21 6月, 2019 1 次提交
    • Y
      EDAC/sifive: Add EDAC platform driver for SiFive SoCs · 91abaeaa
      Yash Shah 提交于
      Add an EDAC driver for SiFive SoCs. The initial version supports ECC
      event monitoring and reporting through the EDAC framework for the SiFive
      L2 cache controller. It registers for notifier events from the L2 cache
      controller driver (arch/riscv/mm/sifive_l2_cache.c) for L2 ECC events.
      
       [ bp: Massage commit message. ]
      Signed-off-by: NYash Shah <yash.shah@sifive.com>
      Signed-off-by: NBorislav Petkov <bp@suse.de>
      Reviewed-by: NJames Morse <james.morse@arm.com>
      Cc: Albert Ou <aou@eecs.berkeley.edu>
      Cc: "David S. Miller" <davem@davemloft.net>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Jonathan Cameron <Jonathan.Cameron@huawei.com>
      Cc: Linus Walleij <linus.walleij@linaro.org>
      Cc: linux-edac <linux-edac@vger.kernel.org>
      Cc: linux-riscv@lists.infradead.org
      Cc: Mauro Carvalho Chehab <mchehab@kernel.org>
      Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
      Cc: Palmer Dabbelt <palmer@sifive.com>
      Cc: "Paul E. McKenney" <paulmck@linux.ibm.com>
      Cc: Paul Walmsley <paul.walmsley@sifive.com>
      Cc: sachin.ghadi@sifive.com
      Link: https://lkml.kernel.org/r/1557142026-15949-2-git-send-email-yash.shah@sifive.com
      91abaeaa
  17. 15 6月, 2019 1 次提交
    • M
      docs: kbuild: convert docs to ReST and rename to *.rst · cd238eff
      Mauro Carvalho Chehab 提交于
      The kbuild documentation clearly shows that the documents
      there are written at different times: some use markdown,
      some use their own peculiar logic to split sections.
      
      Convert everything to ReST without affecting too much
      the author's style and avoiding adding uneeded markups.
      
      The conversion is actually:
        - add blank lines and identation in order to identify paragraphs;
        - fix tables markups;
        - add some lists markups;
        - mark literal blocks;
        - adjust title markups.
      
      At its new index.rst, let's add a :orphan: while this is not linked to
      the main index.rst file, in order to avoid build warnings.
      Signed-off-by: NMauro Carvalho Chehab <mchehab+samsung@kernel.org>
      Signed-off-by: NJonathan Corbet <corbet@lwn.net>
      cd238eff
  18. 21 5月, 2019 1 次提交
  19. 26 4月, 2019 1 次提交
  20. 08 4月, 2019 1 次提交
  21. 03 4月, 2019 1 次提交
    • W
      locking/rwsem: Remove rwsem-spinlock.c & use rwsem-xadd.c for all archs · 390a0c62
      Waiman Long 提交于
      Currently, we have two different implementation of rwsem:
      
       1) CONFIG_RWSEM_GENERIC_SPINLOCK (rwsem-spinlock.c)
       2) CONFIG_RWSEM_XCHGADD_ALGORITHM (rwsem-xadd.c)
      
      As we are going to use a single generic implementation for rwsem-xadd.c
      and no architecture-specific code will be needed, there is no point
      in keeping two different implementations of rwsem. In most cases, the
      performance of rwsem-spinlock.c will be worse. It also doesn't get all
      the performance tuning and optimizations that had been implemented in
      rwsem-xadd.c over the years.
      
      For simplication, we are going to remove rwsem-spinlock.c and make all
      architectures use a single implementation of rwsem - rwsem-xadd.c.
      
      All references to RWSEM_GENERIC_SPINLOCK and RWSEM_XCHGADD_ALGORITHM
      in the code are removed.
      Suggested-by: NPeter Zijlstra <peterz@infradead.org>
      Signed-off-by: NWaiman Long <longman@redhat.com>
      Signed-off-by: NPeter Zijlstra (Intel) <peterz@infradead.org>
      Acked-by: NLinus Torvalds <torvalds@linux-foundation.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Arnd Bergmann <arnd@arndb.de>
      Cc: Borislav Petkov <bp@alien8.de>
      Cc: Davidlohr Bueso <dave@stgolabs.net>
      Cc: H. Peter Anvin <hpa@zytor.com>
      Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Tim Chen <tim.c.chen@linux.intel.com>
      Cc: Will Deacon <will.deacon@arm.com>
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: linux-c6x-dev@linux-c6x.org
      Cc: linux-m68k@lists.linux-m68k.org
      Cc: linux-riscv@lists.infradead.org
      Cc: linux-um@lists.infradead.org
      Cc: linux-xtensa@linux-xtensa.org
      Cc: linuxppc-dev@lists.ozlabs.org
      Cc: nios2-dev@lists.rocketboards.org
      Cc: openrisc@lists.librecores.org
      Cc: uclinux-h8-devel@lists.sourceforge.jp
      Link: https://lkml.kernel.org/r/20190322143008.21313-3-longman@redhat.comSigned-off-by: NIngo Molnar <mingo@kernel.org>
      390a0c62
  22. 26 2月, 2019 1 次提交
  23. 21 2月, 2019 1 次提交
  24. 20 2月, 2019 2 次提交
  25. 19 2月, 2019 1 次提交
    • Y
      32-bit userspace ABI: introduce ARCH_32BIT_OFF_T config option · 942fa985
      Yury Norov 提交于
      All new 32-bit architectures should have 64-bit userspace off_t type, but
      existing architectures has 32-bit ones.
      
      To enforce the rule, new config option is added to arch/Kconfig that defaults
      ARCH_32BIT_OFF_T to be disabled for new 32-bit architectures. All existing
      32-bit architectures enable it explicitly.
      
      New option affects force_o_largefile() behaviour. Namely, if userspace
      off_t is 64-bits long, we have no reason to reject user to open big files.
      
      Note that even if architectures has only 64-bit off_t in the kernel
      (arc, c6x, h8300, hexagon, nios2, openrisc, and unicore32),
      a libc may use 32-bit off_t, and therefore want to limit the file size
      to 4GB unless specified differently in the open flags.
      Signed-off-by: NYury Norov <ynorov@caviumnetworks.com>
      Acked-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NYury Norov <ynorov@marvell.com>
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      942fa985
  26. 05 2月, 2019 1 次提交
    • B
      bpf, riscv: add BPF JIT for RV64G · 2353ecc6
      Björn Töpel 提交于
      This commit adds a BPF JIT for RV64G.
      
      The JIT is a two-pass JIT, and has a dynamic prolog/epilogue (similar
      to the MIPS64 BPF JIT) instead of static ones (e.g. x86_64).
      
      At the moment the RISC-V Linux port does not support
      CONFIG_HAVE_KPROBES, which means that CONFIG_BPF_EVENTS is not
      supported. Thus, no tests involving BPF_PROG_TYPE_TRACEPOINT,
      BPF_PROG_TYPE_PERF_EVENT, BPF_PROG_TYPE_KPROBE and
      BPF_PROG_TYPE_RAW_TRACEPOINT passes.
      
      The implementation does not support "far branching" (>4KiB).
      
      Test results:
        # modprobe test_bpf
        test_bpf: Summary: 378 PASSED, 0 FAILED, [366/366 JIT'ed]
      
        # echo 1 > /proc/sys/kernel/unprivileged_bpf_disabled
        # ./test_verifier
        ...
        Summary: 761 PASSED, 507 SKIPPED, 2 FAILED
      
      Note that "test_verifier" was run with one build with
      CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y and one without, otherwise
      many of the the tests that require unaligned access were skipped.
      
      CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y:
        # echo 1 > /proc/sys/kernel/unprivileged_bpf_disabled
        # ./test_verifier | grep -c 'NOTE.*unknown align'
        0
      
      No CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS:
        # echo 1 > /proc/sys/kernel/unprivileged_bpf_disabled
        # ./test_verifier | grep -c 'NOTE.*unknown align'
        59
      
      The two failing test_verifier tests are:
        "ld_abs: vlan + abs, test 1"
        "ld_abs: jump around ld_abs"
      
      This is due to that "far branching" involved in those tests.
      
      All tests where done on QEMU (QEMU emulator version 3.1.50
      (v3.1.0-688-g8ae951fbc106)).
      Signed-off-by: NBjörn Töpel <bjorn.topel@gmail.com>
      Signed-off-by: NDaniel Borkmann <daniel@iogearbox.net>
      2353ecc6
  27. 24 1月, 2019 1 次提交
  28. 08 1月, 2019 3 次提交
    • D
      riscv: add HAVE_SYSCALL_TRACEPOINTS to Kconfig · 5aeb1b36
      David Abdurachmanov 提交于
      I looked into Documentation/trace/ftrace-design.rst and, I think,
      we check all the boxes needed for HAVE_SYSCALL_TRACEPOINTS.
      Signed-off-by: NDavid Abdurachmanov <david.abdurachmanov@gmail.com>
      Signed-off-by: NPalmer Dabbelt <palmer@sifive.com>
      5aeb1b36
    • D
      riscv: add audit support · efe75c49
      David Abdurachmanov 提交于
      On RISC-V (riscv) audit is supported through generic lib/audit.c.
      The patch adds required arch specific definitions.
      Signed-off-by: NDavid Abdurachmanov <david.abdurachmanov@gmail.com>
      Signed-off-by: NPalmer Dabbelt <palmer@sifive.com>
      efe75c49
    • Z
      RISC-V: Support MODULE_SECTIONS mechanism on RV32 · 2cffc956
      Zong Li 提交于
      This patch supports dynamic generate got and plt sections mechanism on
      rv32. It contains the modification as follows:
       - Always enable MODULE_SECTIONS (both rv64 and rv32)
       - Change the fixed size type.
      
      This patch had been tested by following modules:
      
      btrfs 6795991 0 - Live 0xa544b000
      test_static_keys 17304 0 - Live 0xa28be000
      zstd_compress 1198986 1 btrfs, Live 0xa2a25000
      zstd_decompress 608112 1 btrfs, Live 0xa24e7000
      lzo 8787 0 - Live 0xa2049000
      xor 27461 1 btrfs, Live 0xa2041000
      zram 78849 0 - Live 0xa2276000
      netdevsim 55909 0 - Live 0xa202d000
      tun 211534 0 - Live 0xa21b5000
      fuse 566049 0 - Live 0xa25fb000
      nfs_layout_flexfiles 192597 0 - Live 0xa229b000
      ramoops 74895 0 - Live 0xa2019000
      xfs 3973221 0 - Live 0xa507f000
      libcrc32c 3053 2 btrfs,xfs, Live 0xa34af000
      lzo_compress 17302 2 btrfs,lzo, Live 0xa347d000
      lzo_decompress 7178 2 btrfs,lzo, Live 0xa3451000
      raid6_pq 142086 1 btrfs, Live 0xa33a4000
      reed_solomon 31022 1 ramoops, Live 0xa31eb000
      test_bitmap 3734 0 - Live 0xa31af000
      test_bpf 1588736 0 - Live 0xa2c11000
      test_kmod 41161 0 - Live 0xa29f8000
      test_module 1356 0 - Live 0xa299e000
      test_printf 6024 0 [permanent], Live 0xa2971000
      test_static_key_base 5797 1 test_static_keys, Live 0xa2931000
      test_user_copy 4382 0 - Live 0xa28c9000
      xxhash 70501 2 zstd_compress,zstd_decompress, Live 0xa2055000
      Signed-off-by: NZong Li <zong@andestech.com>
      Signed-off-by: NPalmer Dabbelt <palmer@sifive.com>
      2cffc956
  29. 22 12月, 2018 2 次提交
  30. 21 12月, 2018 1 次提交
  31. 14 12月, 2018 1 次提交
  32. 23 11月, 2018 2 次提交
  33. 01 11月, 2018 1 次提交
  34. 31 10月, 2018 2 次提交