- 07 5月, 2010 5 次提交
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由 Cyril Chemparathy 提交于
This patch eliminates the global gpio_lock, and implements a per-controller lock instead. This also switches to irqsave/irqrestore locks in case gpios are manipulated in isr. Signed-off-by: NCyril Chemparathy <cyril@ti.com> Tested-by: NSandeep Paulraj <s-paulraj@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Cyril Chemparathy 提交于
This patch allows for gpio controllers that deviate from those found on traditional davinci socs. davinci_soc_info has an added field to indicate the soc-specific gpio controller type. The gpio initialization code then bails out if necessary. More elements (tnetv107x) to be added later into enum davinci_gpio_type. Signed-off-by: NCyril Chemparathy <cyril@ti.com> Tested-by: NSandeep Paulraj <s-paulraj@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Cyril Chemparathy 提交于
This patch renders the inlined gpio accessors in gpio.h independent of the underlying controller's register layout. This is done by including three new fields in davinci_gpio_controller to hold the addresses of the set, clear, and in data registers. Other changes: 1. davinci_gpio_regs structure definition moved to gpio.c. This structure is no longer common across all davinci socs (davinci_gpio_controller is). 2. controller base address calculation code (gpio2controller()) moved to gpio.c as this was no longer necessary for the inline implementation. 3. modified inline range checks to use davinci_soc_info.gpio_num instead of DAVINCI_N_GPIO. Signed-off-by: NCyril Chemparathy <cyril@ti.com> Tested-by: NSandeep Paulraj <s-paulraj@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Cyril Chemparathy 提交于
Renamed gpio types to something more sensible: struct gpio_controller --> struct davinci_gpio_regs struct davinci_gpio --> struct davinci_gpio_controller gpio2controller() --> gpio2regs() irq2controller() --> irq2regs() This change also moves davinci_gpio_controller definition to gpio.h. Eventually, the gpio registers structure will be moved to gpio.c and no longer a common cross-soc definition. Signed-off-by: NCyril Chemparathy <cyril@ti.com> Tested-by: NSandeep Paulraj <s-paulraj@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Kevin Hilman 提交于
- Convert data/functions to static - include headers for missing declarations - pointer cleanups: struct foo *__iomem f --> struct foo __iomem *f; Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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- 26 8月, 2009 3 次提交
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由 Sudhakar Rajashekhara 提交于
Adds a macro to convert the GPIO signal passed as bank number and signal to GPIO pin number. Signed-off-by: NSudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Sudhakar Rajashekhara 提交于
DA850/OMAP-L138 has 144 pins configurable as GPIO, but currently this has been configured as 128. This patch corrects it. Also, this patch adds the base address for GPIO pins greater than 128. Signed-off-by: NSudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 David Brownell 提交于
Support DM365 GPIOs ... primarily by handling non-banked GPIO IRQs: - Flag DM365 chips as using non-banked GPIO interrupts, using a new soc_info field. - Replace the gpio_to_irq() mapping logic. This now uses some runtime infrastructure, keyed off that new soc_info field, which doesn't handle irq_to_gpio(). - Provide a new irq_chip ... GPIO IRQs handled directly by AINTC still need edge triggering managed by the GPIO controller. DM365 chips no longer falsely report 104 GPIO IRQs as they boot. Intelligence about IRQ muxing is missing, so for the moment this only exposes the first eight DM365 GPIOs, which are never muxed. The next eight are muxed, half with Ethernet (which uses most of those pins anyway). Tested on DM355 (10 unbanked IRQs _or_ 104 banked ones) and also on DM365 (16 unbanked ones, only 8 made available). Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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- 29 5月, 2009 1 次提交
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由 Mark A. Greer 提交于
The current gpio code needs to know the number of gpio irqs there are and what the bank irq number is. To determine those values, it checks the SoC type. It also assumes that the base address and the number of irqs the interrupt controller uses is fixed. To clean up the SoC checks and make it support different base addresses and interrupt controllers, have the SoC-specific code set those values in the soc_info structure and have the gpio code reference them there. Signed-off-by: NMark A. Greer <mgreer@mvista.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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- 28 4月, 2009 1 次提交
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由 David Brownell 提交于
Update the DaVinci GPIO code to work better on non-dm6446 parts, notably the dm355: - Only handle the number of GPIOs the chip actually has. So for example on dm6467, GPIO-42 is the last GPIO, and trying to use GPIO-43 now fails cleanly; or GPIO-72 on dm6446. - Enable GPIO interrupts on each 16-bit GPIO-irq bank ... previously, only the first five were enabled, so GPIO-80 and above (on dm355) wouldn't trigger IRQs. - Use the right IRQ for each GPIO bank. The wrong values were used for dm355 chips, so GPIO IRQs got routed incorrectly. - Handle up to four pairs of 16-bit GPIO banks ... previously only three were handled, so accessing GPIO-96 and up (e.g. on dm355) would oops. - Update several comments that were dm6446-specific. Verified by receiving GPIO-1 (dm9000) and GPIO-5 (msp430) IRQs on the DM355 EVM. One thing this doesn't do is handle the way some of the GPIO numbers on dm6467 are reserved but aren't valid as GPIOs. Some bitmap logic could fix that if needed. Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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- 24 4月, 2009 1 次提交
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由 Kevin Hilman 提交于
Add arch-specific ioremap() which uses any existing static mappings in place of doing a new mapping. From now on, drivers should always use ioremap() instead of IO_ADDRESS(). In addition, remove the davinci_[read|write]* macros in favor of using ioremap. Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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- 09 1月, 2009 1 次提交
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由 Russell King 提交于
arch/arm/mach-at91/at91cap9.c:337: error: 'NR_AIC_IRQS' undeclared here (not in a function) arch/arm/mach-at91/at91rm9200.c:301: error: 'NR_AIC_IRQS' undeclared here (not in a function) arch/arm/mach-at91/at91sam9260.c:351: error: 'NR_AIC_IRQS' undeclared here (not in a function) arch/arm/mach-at91/at91sam9261.c:287: error: 'NR_AIC_IRQS' undeclared here (not in a function) arch/arm/mach-at91/at91sam9263.c:312: error: 'NR_AIC_IRQS' undeclared here (not in a function) arch/arm/mach-at91/at91sam9rl.c:304: error: 'NR_AIC_IRQS' undeclared here (not in a function) arch/arm/mach-h720x/h7202-eval.c:38: error: implicit declaration of function 'IRQ_CHAINED_GPIOB' arch/arm/mach-ks8695/devices.c:46: error: 'KS8695_IRQ_WAN_RX_STATUS' undeclared here (not in a function) arch/arm/mach-msm/devices.c:28: error: 'INT_UART1' undeclared here (not in a function) arch/arm/mach-mx2/devices.c:233: error: 'MXC_GPIO_IRQ_START' undeclared here (not in a function) arch/arm/mach-mx3/devices.c:128: error: 'MXC_GPIO_IRQ_START' undeclared here (not in a function) arch/arm/mach-omap1/mcbsp.c:140: error: 'INT_730_McBSP1RX' undeclared here (not in a function) arch/arm/mach-omap1/mcbsp.c:165: error: 'INT_McBSP1RX' undeclared here (not in a function) arch/arm/mach-omap1/mcbsp.c:200: error: 'INT_McBSP1RX' undeclared here (not in a function) arch/arm/mach-omap2/board-apollon.c:286: error: implicit declaration of function 'omap_set_gpio_direction' arch/arm/mach-omap2/mcbsp.c:154: error: 'INT_24XX_MCBSP1_IRQ_RX' undeclared here (not in a function) arch/arm/mach-omap2/mcbsp.c:181: error: 'INT_24XX_MCBSP1_IRQ_RX' undeclared here (not in a function) arch/arm/mach-pxa/e350.c:36: error: 'IRQ_BOARD_START' undeclared here (not in a function) arch/arm/plat-s3c/dev-i2c0.c:32: error: 'IRQ_IIC' undeclared here (not in a function) ... Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 17 9月, 2008 1 次提交
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由 David Brownell 提交于
Switch DaVinci SOC gpios over to using the new GPIO library, so it can access GPIO expanders and other non-SOC GPIOs using the same calls. Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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- 07 8月, 2008 2 次提交
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由 Russell King 提交于
This just leaves include/asm-arm/plat-* to deal with. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Remove includes of asm/hardware.h in addition to asm/arch/hardware.h. Then, since asm/hardware.h only exists to include asm/arch/hardware.h, update everything to directly include asm/arch/hardware.h and remove asm/hardware.h. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 31 10月, 2007 1 次提交
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由 David Brownell 提交于
This fixes a build problem with GPIOs on DaVinci. Since it inlines operations for on-chip GPIOs, it needs some headers to support those direct register accesses. Those headers won't be included on other platforms, since they don't have that optimization. Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net> Acked-by: NKevin Hilman <khilman@mvista.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 12 7月, 2007 1 次提交
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由 Vladimir Barinov 提交于
Support GPIO driver for TI DaVinci SoC Signed-off-by: NVladimir Barinov <vbarino@ru.mvista.com> Acked-by: NDavid Brownell <david-b@pacbell.net> Acked-by: NKevin Hilman <khilman@mvista.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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