- 20 5月, 2021 2 次提交
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由 Wayne Lin 提交于
[Why] amdgpu_dm_crtc_set_crc_source() will call amdgpu_dm_crtc_configure_crc_source() to enable/disable CRC generation. However, configuration will be deferred to stream enabled. If stream is not enabled, current flow will still try to get/put vblank refcount. [How] Return EINVAL to skip actions on vblank refcount when stream is not enabled. Signed-off-by: NWayne Lin <Wayne.Lin@amd.com> Reviewed-by: NChao-kai Wang <Stylon.Wang@amd.com> Acked-by: NStylon Wang <stylon.wang@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Wayne Lin 提交于
[Why] Once set ROI and do suspend/resume, current flow will not enable OTG_CRC_CTL again due to we'll defer crc configuration when stream is enabled. [How] Remove current suspend/resume function and have logic implemented into amdgpu_dm_atomic_commit_tail() Signed-off-by: NWayne Lin <Wayne.Lin@amd.com> Reviewed-by: NChao-kai Wang <Stylon.Wang@amd.com> Acked-by: NStylon Wang <stylon.wang@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 12 5月, 2021 2 次提交
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由 Alex Deucher 提交于
Fixes: drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c: In function ‘amdgpu_dm_initialize_drm_device’: drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:3726:7: error: implicit declaration of function ‘register_outbox_irq_handlers’; did you mean ‘register_hpd_handlers’? [-Werror=implicit-function-declaration] 3726 | if (register_outbox_irq_handlers(dm->adev)) { | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ | register_hpd_handlers Fixes: 81927e28 ("drm/amd/display: Support for DMUB AUX") Reviewed-by: NJude Shih <shenshih@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: Jude Shish <Jude.Shih@amd.com>
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由 Alex Deucher 提交于
Fixes: At top level: drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:633:13: warning: ‘dm_dmub_outbox1_low_irq’ defined but not used [-Wunused-function] 633 | static void dm_dmub_outbox1_low_irq(void *interrupt_params) | ^~~~~~~~~~~~~~~~~~~~~~~ Fixes: 81927e28 ("drm/amd/display: Support for DMUB AUX") Reviewed-by: NJude Shih <shenshih@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com> Cc: Jude Shih <Jude.Shih@amd.com>
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- 11 5月, 2021 8 次提交
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由 Alex Deucher 提交于
The DCN3 guards were dropped a while ago, this one must have snuck in in a merge or something. Reviewed-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Zhan Liu 提交于
[Why] If GPU is in reset state, force enabling link will cause unexpected behaviour. [How] Avoid handling HPD IRQ when GPU is in reset state. Signed-off-by: NZhan Liu <zhan.liu@amd.com> Reviewed-by: NNikola Cornij <nikola.cornij@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Jude Shih 提交于
[WHY] To process AUX transactions with DMUB using inbox1 and outbox1 mail boxes. [How] 1) Added inbox1 command DMUB_CMD__DP_AUX_ACCESS to issue AUX commands to DMUB in dc_process_dmub_aux_transfer_async(). DMUB processes AUX cmd with DCN and sends reply back in an outbox1 message triggering an outbox1 interrupt to driver. 2) In existing driver implementation, AUX commands are processed synchronously by configuring DCN reg. But in DMUB AUX, driver sends an inbox1 message and waits for a conditional variable (CV) which will be signaled by outbox1 ISR. 3) DM will retrieve Outbox1 message and send back reply to upper layer and complete the AUX command Signed-off-by: NJude Shih <shenshih@amd.com> Reviewed-by: NHanghong Ma <Hanghong.Ma@amd.com> Reviewed-by: NNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: NWayne Lin <Wayne.Lin@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Mikita Lipski 提交于
[why] Currently the assumption is that we are using a single eDP connector so there will only be one backlight object. Need changes to allow brightness update and reading for multiple eDP connectors. [how] - register a single device - turn backlight link from a pointer to an array of pointers - update brightness of all eDP links at the same time when request is registered - read brightness level only of the primary eDP panel - turn current_backlight_pwm and targer_backlight_pwm debugfs enteries into per connector enteries. Signed-off-by: NMikita Lipski <mikita.lipski@amd.com> Reviewed-by: NNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: NWayne Lin <waynelin@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Nikola Cornij 提交于
[Why] Similar to SST branch, gpio conflict also needs to be avoided on MST. Without doing so, there is a chance that gpio conflict will occur if multiple gpio interrupts arrive simultaneously. [How] By mutex locking/unlocking &aconnector->hpd_lock, we won't get gpio conflict when handling hpd. Signed-off-by: NZhan Liu <zhan.liu@amd.com> Signed-off-by: NNikola Cornij <nikola.cornij@amd.com> Reviewed-by: NBhawanpreet Lakha <bhawanpreet.lakha@amd.com> Acked-by: NZhan Liu <zhan.liu@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Roman Li 提交于
[Why] In gpu reset dc_lock acquired in dm_suspend(). Asynchronously handle_hpd_rx_irq can also be called through amdgpu_dm_irq_suspend->flush_work, which also tries to acquire dc_lock. That causes a deadlock. [How] Check if amdgpu executing reset before acquiring dc_lock. Signed-off-by: NLang Yu <Lang.Yu@amd.com> Signed-off-by: NRoman Li <Roman.Li@amd.com> Reviewed-by: NQingqing Zhuo <Qingqing.Zhuo@amd.com> Acked-by: NWayne Lin <Wayne.Lin@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rodrigo Siqueira 提交于
Our driver supports overlay planes, and as expected, some userspace compositor takes advantage of these features. If the userspace is not enabling the cursor, they can use multiple planes as they please. Nevertheless, we start to have constraints when userspace tries to enable hardware cursor with various planes. Basically, we cannot draw the cursor at the same size and position on two separated pipes since it uses extra bandwidth and DML only run with one cursor. For those reasons, when we enable hardware cursor and multiple planes, our driver should accept variations like the ones described below: +-------------+ +--------------+ | +---------+ | | | | |Primary | | | Primary | | | | | | Overlay | | +---------+ | | | |Overlay | | | +-------------+ +--------------+ In this scenario, we can have the desktop UI in the overlay and some other framebuffer attached to the primary plane (e.g., video). However, userspace needs to obey some rules and avoid scenarios like the ones described below (when enabling hw cursor): +--------+ |Overlay | +-------------+ +-----+-------+ +-| |--+ | +--------+ | +--------+ | | +--------+ | | |Overlay | | |Overlay | | | | | | | | | | | | | | +--------+ | +--------+ | | | | Primary | | Primary | | Primary | +-------------+ +-------------+ +-------------+ +-------------+ +-------------+ | +--------+ | Primary | | |Overlay | | | | | | | | | +--------+ | +--------+ | | Primary | | |Overlay | | +-------------+ +-| |--+ +--------+ If the userspace violates some of the above scenarios, our driver needs to reject the commit; otherwise, we can have unexpected behavior. Since we don't have a proper driver validation for the above case, we can see some problems like a duplicate cursor in applications that use multiple planes. This commit fixes the cursor issue and others by adding adequate verification for multiple planes. Change since V1 (Harry and Sean): - Remove cursor verification from the equation. Cc: Louis Li <Ching-shih.Li@amd.com> Cc: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Cc: Harry Wentland <Harry.Wentland@amd.com> Cc: Hersen Wu <hersenxs.wu@amd.com> Cc: Sean Paul <seanpaul@chromium.org> Signed-off-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com> Reviewed-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Guenter Roeck 提交于
Fix the following build warnings. drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c: In function ‘dm_update_mst_vcpi_slots_for_dsc’: drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:6242:46: warning: variable ‘old_con_state’ set but not used drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c: In function ‘amdgpu_dm_commit_cursors’: drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:7709:44: warning: variable ‘new_plane_state’ set but not used The variables were introduced to be used in iterators, but not used. Use other iterators which don't require the unused variables. Fixes: 8ad27806 ("drm/amd/display: Disable cursors before disabling planes") Fixes: 29b9ba74 ("drm/amd/display: Recalculate VCPI slots for new DSC connectors") Signed-off-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 24 4月, 2021 1 次提交
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由 Harry Wentland 提交于
[Why] This hasn't been well tested and leads to complete system hangs on DCN1 based systems, possibly others. The system hang can be reproduced by gesturing the video on the YouTube Android app on ChromeOS into full screen. [How] Reject atomic commits with non-zero drm_plane_state.src_x or src_y values. v2: - Add code comment describing the reason we're rejecting non-zero src_x and src_y - Drop gerrit Change-Id - Add stable CC - Based on amd-staging-drm-next v3: removed trailing whitespace Signed-off-by: NHarry Wentland <harry.wentland@amd.com> Cc: stable@vger.kernel.org Cc: nicholas.kazlauskas@amd.com Cc: amd-gfx@lists.freedesktop.org Cc: alexander.deucher@amd.com Cc: Roman.Li@amd.com Cc: hersenxs.wu@amd.com Cc: danny.wang@amd.com Reviewed-by: NNicholas Kazlauskas <nicholas.kazlauskas@amd.com> Acked-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NHersen Wu <hersenxs.wu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 16 4月, 2021 4 次提交
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由 Simon Ser 提交于
Accept non-linear buffers which use a multi-planar format, as long as they don't use DCC. Tested on GFX9 with NV12. Signed-off-by: NSimon Ser <contact@emersion.fr> Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Harry Wentland <hwentlan@amd.com> Cc: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com> Cc: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Reviewed-by: NBas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Qingqing Zhuo 提交于
This reverts commit 55fa622f. The regression caused by the original patch has been cleared, thus introduce back the change. Signed-off-by: NQingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Qingqing Zhuo 提交于
[Why] Current list supports modifiers that have DCC_MAX_COMPRESSED_BLOCK set to AMD_FMT_MOD_DCC_BLOCK_128B, while AMD_FMT_MOD_DCC_BLOCK_64B is used instead by userspace. [How] Replace AMD_FMT_MOD_DCC_BLOCK_128B with AMD_FMT_MOD_DCC_BLOCK_64B for modifiers with DCC supported. Fixes: faa37f54 ("drm/amd/display: Expose modifiers") Signed-off-by: NQingqing Zhuo <qingqing.zhuo@amd.com> Reviewed-by: NBas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Tested-by: NBas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Harry Wentland 提交于
[Why] For debugging reasons it can be beneficial to disable any hotplug and DP shortpulse interrupt handling. [How] Expose a debugfs to set a flag to bypass HPD IRQ handling and skip IRQ handling if flag is set. Signed-off-by: NHarry Wentland <harry.wentland@amd.com> Acked-by: NBindu Ramamurthy <bindur12@amd.com> Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 10 4月, 2021 13 次提交
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由 Shaokun Zhang 提交于
drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:941:13: warning: ‘dm_dmub_trace_high_irq’ defined but not used [-Wunused-function] 941 | static void dm_dmub_trace_high_irq(void *interrupt_params) | ^~~~~~~~~~~~~~~~~~~~~~ Fixes: a08f16cf ("drm/amd/display: Log DMCUB trace buffer events") Cc: Leo (Hanghong) Ma <hanghong.ma@amd.com> Cc: Daniel Wheeler <daniel.wheeler@amd.com> Cc: Harry Wentland <Harry.Wentland@amd.com> Cc: Solomon Chiu <solomon.chiu@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NShaokun Zhang <zhangshaokun@hisilicon.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Qingqing Zhuo 提交于
This reverts commit f4a9be99. The original commit was found to cause the following two issues on sienna cichlid: 1. Refresh rate locked during vrrdemo 2. Display sticks on flipped landscape mode after changing orientation, and cannot be changed back to regular landscape Signed-off-by: NQingqing Zhuo <qingqing.zhuo@amd.com> Reviewed-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Mikita Lipski 提交于
[Why&How] The driver always wants to synchronize streams to the first edge of master's vsync pulse. In order to determine that we can read timing flags that are used to program vsync. Master stream's vsync polarity - Multi Display Stream Synchronization edge: Negative - Falling Edge Positive - Rising Edge Signed-off-by: NMikita Lipski <mikita.lipski@amd.com> Reviewed-by: NSun peng Li <Sunpeng.Li@amd.com> Acked-by: NQingqing Zhuo <qingqing.zhuo@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Victor Lu 提交于
[why] Our CI enables drm.debug=0x4 logs and the dmesg is flooded with cursor updates. We probably want to avoid spamming the log with DRM_DEBUG_KMS. [how] Define and use pr_debug macros instead of a few spammy DRM_DEBUG_*'s. Signed-off-by: NVictor Lu <victorchengchi.lu@amd.com> Reviewed-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Diego Viola 提交于
Signed-off-by: NDiego Viola <diego.viola@gmail.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Werner Sembach 提交于
When encoder validation of a display mode fails, retry with less bandwidth heavy YCbCr420 color mode, if available. This enables some HDMI 1.4 setups to support 4k60Hz output, which previously failed silently. On some setups, while the monitor and the gpu support display modes with pixel clocks of up to 600MHz, the link encoder might not. This prevents YCbCr444 and RGB encoding for 4k60Hz, but YCbCr420 encoding might still be possible. However, which color mode is used is decided before the link encoder capabilities are checked. This patch fixes the problem by retrying to find a display mode with YCbCr420 enforced and using it, if it is valid. Reviewed-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NWerner Sembach <wse@tuxedocomputers.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Rodrigo Siqueira 提交于
When we have to debug VRR issues, we usually want to know the current refresh rate; for this reason, it is handy to have a way to check in real-time the refresh rate value. This commit introduces a kernel trace that can provide such information. Signed-off-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com> Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com> Acked-by: NAnson Jacob <Anson.Jacob@amd.com> Tested-by: NDan Wheeler <daniel.wheeler@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Nikola Cornij 提交于
[why] This was a regression introduced by commit: drm/amd/display: Skip modeset for front porch change Due to the change how timing parameters were set, scaled modes would cause a black screen on some eDP panels. Would probably apply to other displays (i.e. even non-eDP) that only have scaled modes, but such case is not that usual for external displays. [how] Pick up crtc frame dimensions when programming the timing unless it's FreeSync video mode. Fixes: 6f59f229 ("drm/amd/display: Skip modeset for front porch change") Signed-off-by: NNikola Cornij <nikola.cornij@amd.com> Reviewed-by: NAurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Sefa Eyeoglu 提交于
Sometimes the primary plane might not be initialized (yet), which causes dm_check_crtc_cursor to divide by zero. Apparently a weird state before a S3-suspend causes the aforementioned divide-by-zero error when resuming from S3. This was explained in bug 212293 on Bugzilla. To avoid this divide-by-zero error we check if the primary plane's fb isn't NULL. If it's NULL the src_w and src_h attributes will be 0, which would cause a divide-by-zero. This fixes Bugzilla report 212293 Bug: https://bugzilla.kernel.org/show_bug.cgi?id=212293 Fixes: 12f4849a ("drm/amd/display: check cursor scaling") Reviewed-by: NSimon Ser <contact@emersion.fr> Reviewed-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NSefa Eyeoglu <contact@scrumplex.net> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Bindu Ramamurthy 提交于
[Why] idle optimization was being disabled after commit. [How] check vblank count for display off and enable idle optimization based on this count. Also,check added to ensure vblank count does not decrement, when count reaches 0. Reviewed-by: NKenneth Feng <kenneth.feng@amd.com> Signed-off-by: NBindu Ramamurthy <bindu.r@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Mark Yacoub 提交于
On initializing the framebuffer, call drm_any_plane_has_format to do a check if the modifier is supported. drm_any_plane_has_format calls dm_plane_format_mod_supported which is extended to validate that the modifier is on the list of the plane's supported modifiers. The bug was caught using igt-gpu-tools test: kms_addfb_basic.addfb25-bad-modifier Tested on ChromeOS Zork by turning on the display, running an overlay test, and running a YT video. === Changes from v1 === Explicitly handle DRM_FORMAT_MOD_INVALID modifier. Cc: Alex Deucher <alexander.deucher@amd.com> Cc: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl> Signed-off-by: NMark Yacoub <markyacoub@chromium.org> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Luben Tuikov 提交于
Convert IRQ-based prints from DRM_DEBUG_DRIVER to the appropriate DRM log type, since IRQ-based prints drown out the rest of the driver's DRM_DEBUG_DRIVER messages. v2: Update as per feedback to fine-tune for each type of DRM log level. Cc: Harry Wentland <Harry.Wentland@amd.com> Cc: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: NLuben Tuikov <luben.tuikov@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Leo (Hanghong) Ma 提交于
[Why] We want to log DMCUB trace buffer events as Linux kernel traces. [How] Register an IRQ handler for DMCUB outbox0 interrupt in amdgpu_dm, and log the messages in the DMCUB tracebuffer to a new DMCUB TRACE_EVENT as soon as we receive the outbox0 IRQ from DMCUB FW. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NLeo (Hanghong) Ma <hanghong.ma@amd.com> Reviewed-by: NHarry Wentland <Harry.Wentland@amd.com> Acked-by: NSolomon Chiu <solomon.chiu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 24 3月, 2021 10 次提交
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由 Wayne Lin 提交于
[Why] Find out that when we are registering vertical interrupt0, we get DC_IRQ_SOURCE_INVALID when call dc_interrupt_to_irq_source for DCN_1_0__SRCID__OTG6_VERTICAL_INTERRUPT0_CONTROL. After analyzing, it's due to the defined value for DCN_1_0__SRCID__OTG6_VERTICAL_INTERRUPT0_CONTROL is not (DCN_1_0__SRCID__OTG5_VERTICAL_INTERRUPT0_CONTROL + 1). It's not incremental sequence. [How] Use an array to record all vertical interrupt0 SRCID. While registering interrupt, use an incremental index to visit the array to get the right SRCID to register. Also add error handling to avoid potential pointer problem. Signed-off-by: NWayne Lin <Wayne.Lin@amd.com> Reviewed-by: NNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: NSolomon Chiu <solomon.chiu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Nikola Cornij 提交于
Since this is a "revert of a revert", the end effect is that freesync video is back to its original state, the way it was before the first revert. Signed-off-by: NNikola Cornij <nikola.cornij@amd.com> Reviewed-by: NAurabindo Pillai <aurabindo.pillai@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Qingqing Zhuo 提交于
[Why] vblank_workqueue is never released. [How] Free it upon dm finish. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NQingqing Zhuo <qingqing.zhuo@amd.com> Reviewed-by: NNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: NSolomon Chiu <solomon.chiu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Wayne Lin 提交于
[Why] Received compiling warning: All warnings (new ones prefixed by >>): >> drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:5574:5: warning: no previous prototype for 'amdgpu_dm_crtc_late_register' [-Wmissing-prototypes] 5574 | int amdgpu_dm_crtc_late_register(struct drm_crtc *crtc) | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c: In function 'dm_update_mst_vcpi_slots_for_dsc': drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:6405:46: warning: variable 'old_con_state' set but not used [-Wunused-but-set-variable] 6405 | struct drm_connector_state *new_con_state, *old_con_state; | ^~~~~~~~~~~~~ drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c: In function 'amdgpu_dm_commit_cursors': drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c:8006:44: warning: variable 'new_plane_state' set but not used [-Wunused-but-set-variable] 8006 | struct drm_plane_state *old_plane_state, *new_plane_state; | ^~~~~~~~~~~~~~~ vim +/amdgpu_dm_crtc_late_register +5574 drivers/gpu/drm/amd/amdgpu/../display/amdgpu_dm/amdgpu_dm.c 5572 5573 #ifdef CONFIG_DRM_AMD_SECURE_DISPLAY > 5574 int amdgpu_dm_crtc_late_register(struct drm_crtc *crtc) 5575 { 5576 crtc_debugfs_init(crtc); 5577 5578 return 0; 5579 } 5580 #endif 5581 [How] Fix it with declaration as "static" Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Reported-by: Nkernel test robot <lkp@intel.com> Signed-off-by: NWayne Lin <Wayne.Lin@amd.com> Reviewed-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com> Acked-by: NSolomon Chiu <solomon.chiu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Anson Jacob 提交于
[Why] dc_cursor_position do not initialise position.translate_by_source when crtc or plane->state->fb is NULL. UBSAN caught this error in dce110_set_cursor_position, as the value was garbage. [How] Initialise dc_cursor_position structure elements to 0 in handle_cursor_update before calling get_cursor_position. Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1471Reported-by: NLyude Paul <lyude@redhat.com> Signed-off-by: NAnson Jacob <Anson.Jacob@amd.com> Reviewed-by: NAurabindo Jayamohanan Pillai <Aurabindo.Pillai@amd.com> Acked-by: NSolomon Chiu <solomon.chiu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Nikola Cornij 提交于
[why] It helps debugging display setup issues Tested-by: NDaniel Wheeler <daniel.wheeler@amd.com> Signed-off-by: NNikola Cornij <nikola.cornij@amd.com> Reviewed-by: NNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com> Acked-by: NSolomon Chiu <solomon.chiu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Anson Jacob 提交于
'drm/drm_hdcp.h' included in 'amdgpu_dm.c' is duplicated. Reported-by: NZhang Yunkai <zhang.yunkai@zte.com.cn> Signed-off-by: NAnson Jacob <Anson.Jacob@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Anson Jacob 提交于
This reverts commit 51713e4e. The duplicate from #79 should be removed instead. Signed-off-by: NAnson Jacob <Anson.Jacob@amd.com> Acked-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Qingqing Zhuo 提交于
[Why] CONFIG_DRM_AMD_DC_DCN3_0 has been folded into CONFIG_DRM_AMD_DC_DCN and is not needed. [How] Drop CONFIG_DRM_AMD_DC_DCN3_0. Signed-off-by: NQingqing Zhuo <qingqing.zhuo@amd.com> Reviewed-by: NRodrigo Siqueira <Rodrigo.Siqueira@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Zhan Liu 提交于
[Why] DC needs to communicate with PM FW through GPU memory. In order to do so we need to be able to allocate memory from within DC. [How] Call amdgpu_bo_create_kernel to allocate GPU memory and use a list in amdgpu_display_manager to track our allocations so we can clean them up later. Signed-off-by: NHarry Wentland <harry.wentland@amd.com> Signed-off-by: NZhan Liu <zhan.liu@amd.com> Reviewed-by: NCharlene Liu <charlene.liu@amd.com> Acked-by: NZhan Liu <zhan.liu@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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