- 17 2月, 2011 2 次提交
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由 Hemant Pedanekar 提交于
This patch updates the common machine specific source files with support for TI816X. Signed-off-by: NHemant Pedanekar <hemantp@ti.com> Reviewed-by: NKevin Hilman <khilman@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Hemant Pedanekar 提交于
This patch updates the common platform files with TI816X support. The approach taken in this patch is to add TI816X as part of OMAP3 variant where the cpu class is considered as OMAP34XX and the type is TI816X. This means, both cpu_is_omap34xx() and cpu_is_ti816x() checks return success on TI816X. A kernel config option CONFIG_SOC_OMAPTI816X is added under OMAP3 to include support for TI816X build. Signed-off-by: NHemant Pedanekar <hemantp@ti.com> Reviewed-by: NKevin Hilman <khilman@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 15 2月, 2011 2 次提交
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由 Tony Lindgren 提交于
The new init_early hook happens at the end of setup_arch, which is too early for kzalloc. However, there's no need to call omap_serial_early_init that early, so fix this by setting it up as a core_initcall. Signed-off-by: NTony Lindgren <tony@atomide.com> Tested-by: NKevin Hilman <khilman@ti.com>
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由 Tony Lindgren 提交于
Otherwise things will fail with early_init changes. Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 20 1月, 2011 3 次提交
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由 Adrian Hunter 提交于
When clearing the DMA channel, clear all status bits. When handling a DMA interrupt, clear only the interrupt status bits that have been read and are passed to the channel's interrupt handler, not every status bit. Signed-off-by: NAdrian Hunter <adrian.hunter@nokia.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NG, Manjunath Kondaiah <manjugk@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
Earlier patches select HAVE_SCHED_CLOCK for omaps. To have working sched_clock also for MPU timer, we need to implement it in a way where the right one gets selected during the runtime. Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
For omap15xx and 730 we need to use the MPU timer as the 32K timer is not available. For omap16xx we want to use the 32K timer because of PM. Fix this by allowing to build in both timers. Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 19 1月, 2011 1 次提交
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由 Paul Walmsley 提交于
After commit dc548fbb ("ARM: omap: convert sched_clock() to use new infrastructure"), OMAPs that use the 32KiHz "synchronization timer" as their clocksource crash during boot: [ 0.000000] OMAP clockevent source: GPTIMER1 at 32768 Hz [ 0.000000] Unable to handle kernel NULL pointer dereference at virtual address 00000000 [ 0.000000] pgd = c0004000 [ 0.000000] [00000000] *pgd=00000000 [ 0.000000] Internal error: Oops: 80000005 [#1] SMP [ 0.000000] last sysfs file: [ 0.000000] Modules linked in: [ 0.000000] CPU: 0 Tainted: G W (2.6.37-07734-g2467802 #7) [ 0.000000] PC is at 0x0 [ 0.000000] LR is at sched_clock_poll+0x2c/0x3c [ 0.000000] pc : [<00000000>] lr : [<c0060b74>] psr: 600001d3 [ 0.000000] sp : c058bfd0 ip : c058a000 fp : 00000000 [ 0.000000] r10: 00000000 r9 : 411fc092 r8 : 800330c8 [ 0.000000] r7 : c05a08e0 r6 : c0034c48 r5 : c05ffc40 r4 : c0034c4c [ 0.000000] r3 : c05ffe6c r2 : c05a0bc0 r1 : c059f098 r0 : 00000000 [ 0.000000] Flags: nZCv IRQs off FIQs off Mode SVC_32 ISA ARM Segment kernel [ 0.000000] Control: 10c53c7f Table: 8000404a DAC: 00000017 This is due to the recent ARM init_sched_clock() changes and the late initialization of the counter_32k clock source. More information here: http://marc.info/?l=linux-omap&m=129513468605208&w=2 Fix by initializing the counter_32k clocksource during the machine timer initialization. Reported-by: NRussell King <rmk+kernel@arm.linux.org.uk> Tested-by: NThomas Weber <weber@corscience.de> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 14 1月, 2011 1 次提交
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由 Lennert Buytenhek 提交于
Signed-off-by: NLennert Buytenhek <buytenh@secretlab.ca>
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- 10 1月, 2011 5 次提交
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由 Sumit Semwal 提交于
A panel connects to one of the overlay managers of DSS through some interface block. On OMAP4, specifying the type of the display is not sufficient to conclude which manager the panel should be connected to. Hence, a new member 'channel' is introduced in omap_dss_device structure to determine which manager the panel uses. The dss_recheck_connections() called in dss_driver_probe() uses this channel parameter to set the correct manager to the corresponding omap_dss_device. The channel parameter is used only once to ensure the correct managers are set for each panel. The parameter dssdev->manager->id will take care of ensuring that the panel and then the interface driver configures the correct DISPC channel. Also, add a new Overlay Manager in manager.c, make other changes needed for LCD2 channel. Signed-off-by: NSumit Semwal <sumit.semwal@ti.com> Signed-off-by: NMukund Mittal <mmittal@ti.com> Signed-off-by: NSamreen <samreen@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@nokia.com>
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由 Sumit Semwal 提交于
DISPC functions are modified in order to work when the manager is LCD2. This includes: Adding new IRQs specific to LCD2 and their handling. Provide dumps of the new manager's registers. Provide dumps of the new manager's clocks. Checks for channel for registers DISPC_CONTROL2 and DISPC_CONFIG2 which can't be parametrized. Signed-off-by: NSumit Semwal <sumit.semwal@ti.com> Signed-off-by: NMukund Mittal <mmittal@ti.com> Signed-off-by: NSamreen <samreen@ti.com> Signed-off-by: NArchit Taneja <archit@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@nokia.com>
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由 Sumit Semwal 提交于
On OMAP4, we have a new DISPC channel for Overlay Manager LCD2. There is a set of regsiters for LCD2 channel similar to the existing LCD channel, like DISPC_CONTROL2, DISPC_DIVISOR2, DISPC_CONFIG2 and so on. Introduce new enum members for LCD2 Channel and corresponding Overlay Manager in display.h. Represent the following DISPC register defines with channel as a parameter to differentiate between LCD and LCD2 registers (and also DIGIT in some cases): DISPC_DEFAULT_COLOR, DISPC_TRANS_COLOR, DISPC_TIMING_H, DISPC_TIMING_V, DISPC_POL_FREQ, DISPC_DIVISOR, DISPC_SIZE_LCD, DISPC_DATA_CYCLEk, DISPC_CPR_COEF_R, DISPC_CPR_COEF_G and DISPC_CPR_COEF_B This parametrization helps in reducing the number of register defines for DISPC. Replace the existing reads/writes to these registers in this new way. Also, Introduce defines for registers DISPC_CONTROL2 and DISPC_CONFIG2 which are used exclusively for LCD2 channel. Signed-off-by: NSumit Semwal <sumit.semwal@ti.com> Signed-off-by: NMukund Mittal <mmittal@ti.com> Signed-off-by: NSamreen <samreen@ti.com> Signed-off-by: NArchit Taneja <archit@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@nokia.com>
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由 Bryan Wu 提交于
Generic DPI panel driver includes the driver and 4 similar panel configurations. It will match the panel name which is passed from platform data and setup the right configurations. With generic DPI panel driver, we can remove those 4 duplicated panel display drivers. In the future, it is simple for us just add new panel configuration date in panel-generic-dpi.c to support new display panel. Signed-off-by: NBryan Wu <bryan.wu@canonical.com> Acked-by: NArchit Taneja <archit@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@nokia.com>
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由 Rajkumar N 提交于
Enable dss to process color formats with pre-mulitplied alpha. With this we can have alpha values defined for each pixel and hence can have different blending values for each pixel. sysfs entry has been created for this and pre-multiplied alpha support is turned off by default. Signed-off-by: NSudeep Basavaraj <sudeep.basavaraj@ti.com> Signed-off-by: NRajkumar N <rajkumar.nagarajan@ti.com> Signed-off-by: NSamreen <samreen@ti.com> Signed-off-by: NArchit Taneja <archit@ti.com> Signed-off-by: NTomi Valkeinen <tomi.valkeinen@nokia.com>
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- 08 1月, 2011 5 次提交
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由 Santosh Shilimkar 提交于
CC arch/arm/mach-omap2/omap_hwmod_common_data.o In file included from arch/arm/plat-omap/include/plat/omap_hwmod.h:38, from arch/arm/mach-omap2/omap_hwmod_common_data.c:20: arch/arm/plat-omap/include/plat/voltage.h: In function 'omap_voltage_late_init': arch/arm/plat-omap/include/plat/voltage.h:145: error: 'EINVAL' undeclared (first use in this function) arch/arm/plat-omap/include/plat/voltage.h:145: error: (Each undeclared identifier is reported only once arch/arm/plat-omap/include/plat/voltage.h:145: error: for each function it appears in.) make[1]: *** [arch/arm/mach-omap2/omap_hwmod_common_data.o] Error 1 make: *** [arch/arm/mach-omap2] Error 2 The error is reported when omap2plus_defconfig built with CONFIG_PM disabled Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Cc: Thara Gopinath <thara@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Nishanth Menon <nm@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Santosh Shilimkar 提交于
LD init/built-in.o LD .tmp_vmlinux1 arch/arm/mach-omap2/built-in.o: In function `omap2_set_init_voltage': arch/arm/mach-omap2/pm.c:181: undefined reference to `omap_voltage_domain_lookup' arch/arm/mach-omap2/built-in.o: In function `omap4_twl_init': arch/arm/mach-omap2/omap_twl.c:244: undefined reference to `omap_voltage_domain_lookup' arch/arm/mach-omap2/omap_twl.c:247: undefined reference to `omap_voltage_domain_lookup' arch/arm/mach-omap2/omap_twl.c:250: undefined reference to `omap_voltage_domain_lookup' make: *** [.tmp_vmlinux1] Error 1 The error is reported when omap2plus_defconfig built with CONFIG_PM disabled Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Cc: Thara Gopinath <thara@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Nishanth Menon <nm@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Santosh Shilimkar 提交于
Fix below build warnings CC arch/arm/mach-omap2/common.o CC arch/arm/mach-omap2/gpio.o In file included from arch/arm/plat-omap/include/plat/omap_hwmod.h:38, from arch/arm/mach-omap2/gpio.c:25: arch/arm/plat-omap/include/plat/voltage.h: In function 'omap_voltage_register_pmic': arch/arm/plat-omap/include/plat/voltage.h:137: warning: no return statement in function returning non-void CC arch/arm/mach-omap2/dma.o In file included from arch/arm/plat-omap/include/plat/omap_hwmod.h:38, from arch/arm/mach-omap2/dma.c:32: arch/arm/plat-omap/include/plat/voltage.h: In function 'omap_voltage_register_pmic': arch/arm/plat-omap/include/plat/voltage.h:137: warning: no return statement in function returning non-void CC arch/arm/mach-omap2/wd_timer.o In file included from arch/arm/plat-omap/include/plat/omap_hwmod.h:38, from arch/arm/mach-omap2/wd_timer.c:15: arch/arm/plat-omap/include/plat/voltage.h: In function 'omap_voltage_register_pmic': arch/arm/plat-omap/include/plat/voltage.h:137: warning: no return statement in function returning non-void CC arch/arm/mach-omap2/prm44xx.o CC arch/arm/mach-omap2/omap_hwmod.o In file included from arch/arm/plat-omap/include/plat/omap_hwmod.h:38, from arch/arm/mach-omap2/omap_hwmod.c:145: arch/arm/plat-omap/include/plat/voltage.h: In function 'omap_voltage_register_pmic': arch/arm/plat-omap/include/plat/voltage.h:137: warning: no return statement in function returning non-void CC arch/arm/mach-omap2/omap_hwmod_common_data.o In file included from arch/arm/plat-omap/include/plat/omap_hwmod.h:38, from arch/arm/mach-omap2/omap_hwmod_common_data.c:20: arch/arm/plat-omap/include/plat/voltage.h: In function 'omap_voltage_register_pmic': arch/arm/plat-omap/include/plat/voltage.h:137: warning: no return statement in function returning non-void The error is reported when omap2plus_defconfig built with CONFIG_PM disabled Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Cc: Thara Gopinath <thara@ti.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Nishanth Menon <nm@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Felipe Balbi 提交于
Instead of accessing the irq_desc array directly we can use irq_to_desc(irq). That will allow us to, if wanted, select SPARSE_IRQ and irq_descs will be added to a radix tree, instead of a array. Signed-off-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Mika Westerberg 提交于
In case on OMAP2+ we call set_24xx_gpio_triggering() instead of updating reg and l values. However, at the end of the function we perform a write: __raw_writel(l, reg); So on OMAP2+ we end up writing 0 to the bank->base which is not correct (typically this points to GPIO_REVISION register). Fix this by returning immediately after call to set_24xx_gpio_triggering(). Signed-off-by: NMika Westerberg <ext-mika.1.westerberg@nokia.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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- 06 1月, 2011 1 次提交
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由 Adrian Hunter 提交于
Prevent OneNAND's voltage regulator from going to sleep while OneNAND is in use, by explicitly enabling and disabling the regulator as appropriate. Signed-off-by: NAdrian Hunter <adrian.hunter@nokia.com> Signed-off-by: NDavid Woodhouse <David.Woodhouse@intel.com>
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- 03 1月, 2011 1 次提交
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由 Russell King 提交于
Replace the page_to_dma() and dma_to_page() macros with their PFN equivalents. This allows us to map parts of memory which do not have a struct page allocated to them to bus addresses. This will be used internally by dma_alloc_coherent()/dma_alloc_writecombine(). Build tested on Versatile, OMAP1, IOP13xx and KS8695. Tested-by: NJanusz Krzysztofik <jkrzyszt@tis.icnet.pl> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 25 12月, 2010 1 次提交
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由 Ben Gamari 提交于
It appears that arch/arm/mach-omap2/timer-gp.o is needed by OMAP2PLUS. Since timer-gp.o has direct dependencies on omap_dm_timer_*, it seems correct for the architecture to depend upon OMAP_DM_TIMER, otherwise unsuspecting integrators will be faced with a whole bunch of linker errors at the end of their kernel build: arch/arm/mach-omap2/built-in.o: In function `omap2_gp_timer_set_mode': /home/bgamari/trees/linux-2.6/arch/arm/mach-omap2/timer-gp.c:84: undefined reference to `omap_dm_timer_stop' /home/bgamari/trees/linux-2.6/arch/arm/mach-omap2/timer-gp.c:88: undefined reference to `omap_dm_timer_get_fclk' /home/bgamari/trees/linux-2.6/arch/arm/mach-omap2/timer-gp.c:90: undefined reference to `omap_dm_timer_set_load_start' ... Signed-off-by: NBen Gamari <bgamari.foss@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 23 12月, 2010 12 次提交
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由 Tony Lindgren 提交于
This is needed to pass board specific data such as pads used to the platform level driver init code. Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
This allows adding hwmod specific pads dynamically during the platform device init. Note that we don't currently have the hwmod specific signals listed in the hwmod data, but struct omap_hwmod_mux_info will make that possible if necessary. Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Russell King 提交于
Convert omap to use the new sched_clock() infrastructure for extending 32bit counters to full 64-bit nanoseconds. Tested-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
ftrace requires sched_clock() to be notrace. Ensure that all implementations are so marked. Also make sure that they include linux/sched.h Also ensure OMAP clocksource read functions are marked notrace as they're used for sched_clock() too. Tested-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: NWill Deacon <will.deacon@arm.com> Tested-by: NMikael Pettersson <mikpe@it.uu.se> Tested-by: NEric Miao <eric.y.miao@gmail.com> Tested-by: NOlof Johansson <olof@lixom.net> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
In d7e81c26 (clocksource: Add clocksource_register_hz/khz interface) new interfaces were added which simplify (and optimize) the selection of the divisor shift/mult constants. Switch over to using this new interface. Tested-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Thara Gopinath 提交于
This patch extends the smartreflex framework to support OMAP4. The changes are minor like compiling smartreflex Kconfig option for OMAP4 also, and a couple of OMAP4 checks in the smartreflex framework. The change in sr_device.c where new logic has to be introduced for reading the efuse registers is due to the fact that in OMAP4 the efuse registers are 24 bit aligned. A __raw_readl will fail for non-32 bit aligned address and hence the 8-bit read and shift. Signed-off-by: NThara Gopinath <thara@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Thara Gopinath 提交于
OMAP4 has three scalable voltage domains vdd_mpu, vdd_iva and vdd_core. This patch adds the voltage tables and other configurable voltage processor and voltage controller settings to control these three scalable domains in OMAP4. Signed-off-by: NThara Gopinath <thara@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Thara Gopinath 提交于
Smartreflex Class3 implementation continuously monitors silicon performance and instructs the Voltage Processors to increase or decrease the voltage. This patch adds smartreflex class 3 driver. This driver hooks up with the generic smartreflex driver smartreflex.c to abstract out class specific implementations out of the generic driver. Class3 driver is chosen as the default class driver for smartreflex. If any other class driver needs to be implemented, the init of that driver should be called from the board file. That way the new class driver will over-ride the Class3 driver. Signed-off-by: NThara Gopinath <thara@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Thara Gopinath 提交于
SmartReflex modules do adaptive voltage control for real-time voltage adjustments. With Smartreflex the power supply voltage can be adapted to the silicon performance(manufacturing process, temperature induced performance, age induced performance etc). There are differnet classes of smartreflex implementation. Class-0: Manufacturing Test Calibration Class-1: Boot-Time Software Calibration Class-2: Continuous Software Calibration Class-3: Continuous Hardware Calibration Class-4: Fully Integrated Power Management OMAP3 has two smartreflex modules one associated with VDD MPU and the other associated with VDD CORE. This patch adds support for smartreflex driver. The driver is designed for Class-1 , Class-2 and Class-3 support and is a platform driver. Smartreflex driver can be enabled through a Kconfig option "SmartReflex support" under "System type"->"TI OMAP implementations" menu. Smartreflex autocompensation feature can be enabled runtime through a debug fs option. To enable smartreflex autocompensation feature echo 1 > /debug/voltage/vdd_<X>/smartreflex/autocomp To disable smartreflex autocompensation feature echo 0 > /debug/voltage/vdd_<X>/smartreflex/autocomp where X can be mpu, core , iva etc. This patch contains code originally in linux omap pm branch. Major contributors to this driver are Lesly A M, Rajendra Nayak, Kalle Jokiniemi, Paul Walmsley, Nishant Menon, Kevin Hilman. Signed-off-by: NThara Gopinath <thara@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Thara Gopinath 提交于
This patch extends the device hwmod structure to contain info about the voltage domain to which the device belongs to. This is needed to support a device based DVFS where the device knows which voltage domain it belongs to. Signed-off-by: NThara Gopinath <thara@ti.com> Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Thara Gopinath 提交于
This patch adds voltage driver support for OMAP3. The driver allows configuring the voltage controller and voltage processors during init and exports APIs to enable/disable voltage processors, scale voltage and reset voltage. The driver maintains the global voltage table on a per VDD basis which contains the various voltages supported by the VDD along with per voltage dependent data like smartreflex efuse offset, errminlimit and voltage processor errorgain. The driver also allows the voltage parameters dependent on the PMIC to be passed from the PMIC file through an API. The driver allows scaling of VDD voltages either through "vc bypass method" or through "vp forceupdate method" the choice being configurable through the board file. This patch contains code originally in linux omap pm branch smartreflex driver. Major contributors to this driver are Lesly A M, Rajendra Nayak, Kalle Jokiniemi, Paul Walmsley, Nishant Menon, Kevin Hilman. The separation of PMIC parameters into a separate structure which can be populated from the PMIC file is based on the work of Lun Chang from Motorola in an internal tree. Signed-off-by: NThara Gopinath <thara@ti.com> [khilman: fixed link error for OMAP2-only defconfig] Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com>
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由 Janusz Krzysztofik 提交于
Most keypad drivers make use of the <linux/input/matrix_keypad.h> defined macros, structures and inline functions. Convert omap-keypad driver to use those as well, as suggested by a compile time warning, hardcoded into the OMAP <palt/keypad.h>. Created against linux-2.6.37-rc5. Tested on Amstrad Delta. Compile tested with omap1_defconfig and omap2plus_defconfig shrinked to board-h4. Signed-off-by: NJanusz Krzysztofik <jkrzyszt@tis.icnet.pl> Reviewed-by: NAaro Koskinen <aaro.koskinen@nokia.com> Acked-by: NDmitry Torokhov <dtor@mail.ru> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 22 12月, 2010 6 次提交
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由 Kevin Hilman 提交于
For devices which have not (yet) been converted to use omap_device, implement the context loss counter using the "brutal method" as originally proposed by Paul Walmsley[1]. The dummy context loss counter is incremented every time it is checked, but only when off-mode is enabled. When off-mode is disabled, the dummy counter stops incrementing. Tested on 36xx/Zoom3 using MMC driver, which is currently the only in-tree user of this API. This patch should be reverted after all devices are converted to using omap_device. [1] http://marc.info/?l=linux-omap&m=129176260000626&w=2Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> [paul@pwsan.com: fixed compile warning; fixed to compile on OMAP1] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Kevin Hilman 提交于
Implement OMAP PM layer omap_pm_get_dev_context_loss_count() API by creating similar APIs at the omap_device and omap_hwmod levels. The omap_hwmod level call is the layer with access to the powerdomain core, so it is the place where the powerdomain is queried to get the context loss count. The new APIs return an unsigned value that can wrap as the context-loss count grows. However, the wrapping is not important as the role of this function is to determine context loss by checking for any difference in subsequent calls to this function. Note that these APIs at each level can return zero when no context loss is detected, or on errors. This is to avoid returning error codes which could potentially be mistaken for large context loss counters. NOTE: only works for devices which have been converted to use omap_device/omap_hwmod. Longer term, we could possibly remove this API from the OMAP PM layer, and instead directly use the omap_device level API. Signed-off-by: NKevin Hilman <khilman@deeprootsystems.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Jon Hunter 提交于
J-Type DPLLs have additional configuration parameters that need to be programmed when setting the multipler and divider for the DPLL. These parameters being the sigma delta divider (SD_DIV) for the DPLL and the digital controlled oscillator (DCO) to be used by the DPLL. The current code is implemented specifically to configure the OMAP3630 PER J-Type DPLL. The OMAP4430 USB DPLL is also a J-Type DPLL and so this code needs to be updated to work for both OMAP3 and OMAP4 devices and any other future devices that have J-TYPE DPLLs. For the OMAP3630 PER DPLL both the SD_DIV and DCO paramenters are used but for the OMAP4430 USB DPLL only the SD_DIV field is used. The current implementation will only program the SD_DIV and DCO fields if the DPLL has both and hence this does not work for OMAP4430. In order to make the code more generic add two new fields to the dpll_data structure for the SD_DIV field and DCO field bit-masks and only program these fields if the masks are defined for a specific DPLL. This simplifies the code and allows us to remove the flag DPLL_NO_DCO_SEL. Tested on OMAP36xx Zoom3 and OMAP4 Blaze. Signed-off-by: NJon Hunter <jon-hunter@ti.com> [paul@pwsan.com: removed explicit inlining and added '_' prefix on lookup_*() functions; added testing info to commit message; added 35xx comments back in] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Benoit Cousson 提交于
The new OMAP4 IPs introduced a new idle mode named smart-idle with wakeup. This new idlemode replaces the enawakeup for the new IPs but seems to coexist as well for some legacy IPs (UART, GPIO, MCSPI...) Add the new SIDLE_SMART_WKUP flag to mark the IPs that support this capability. The omap_hwmod_44xx_data.c will have to be updated to add this new flag. Enable this new mode when applicable in _enable_wakeup, _enable_sysc and _idle_sysc. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Tested-by: NSebastien Guiriec <s-guiriec@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Rajendra Nayak <rnayak@ti.com>
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由 Benoit Cousson 提交于
Do not allow omap_hwmod_register to be used outside the core hwmod code. An omap_hwmod should be registered only at init time. Remove the omap_hwmod_unregister that is not used today since the hwmod list will be built once at init time and never be modified at runtime. Signed-off-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com>
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由 Paul Walmsley 提交于
Clarify the usage of the struct omap_clk.cpu flags (e.g., CK_*) to use bits only for individual SoC variants (e.g., CK_3430ES1, CK_3505, etc.). Superset flags, such as CK_3XXX or CK_AM35XX, are now defined as disjunctions of individual SoC variant flags. This simplifies the definition and use of these flags. struct omap_clk record definitions can now simply specify the bitmask of actual SoCs that the records are valid for. The clock init code can simply set a single CPU type mask bit for the SoC that is currently in use, and test against that, rather than needing to set some combination of flags. Similarly, clarify the use of struct clksel_rate.flags. The bit allocated for RATE_IN_3XXX has been reassigned, and RATE_IN_3XXX has been defined as a disjunction of the 34xx and 36xx rate flags. The advantages are the same as the above. Clarify the usage of struct omap_clk.cpu flags such as CK_34XX to only apply to the SoCs that they name, e.g., OMAP34xx chips. The previous practice caused significantly different SoCs, such as OMAP36xx, to be included in CK_34XX. In my opinion, this is much more intuitive. Similarly, clarify the use of struct clksel_rate.flags, such that RATE_IN_3430ES2PLUS now only applies to 34xx chips with ES level >= 2 - it does not apply to OMAP36xx. ... At some point, it probably makes sense to collapse the CK_* and RATE_IN_* flags together into a single bitfield, and possibly use the existing CHIP_IS_OMAP* flags for platform detection. ... This all seems to work fine on OMAP34xx and OMAP36xx Beagle. Not sure if it works on Sitara or the TI816X, unfortunately I don't have any here to test with. Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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