提交 fecfb644 编写于 作者: G Guenter Roeck

hwmon: (zl6100) Enable interval between chip accesses for all chips

Intersil reports that all chips supported by the zl6100 driver require
an interval between chip accesses, even ZL2004 and ZL6105 which were thought
to be safe.
Reported-by: NVivek Gani <vgani@intersil.com>
Cc: stable@vger.kernel.org # 3.2+
Signed-off-by: NGuenter Roeck <guenter.roeck@ericsson.com>
上级 c43524b5
......@@ -88,14 +88,12 @@ Module parameters
delay
-----
Some Intersil/Zilker Labs DC-DC controllers require a minimum interval between
I2C bus accesses. According to Intersil, the minimum interval is 2 ms, though
1 ms appears to be sufficient and has not caused any problems in testing.
The problem is known to affect ZL6100, ZL2105, and ZL2008. It is known not to
affect ZL2004 and ZL6105. The driver automatically sets the interval to 1 ms
except for ZL2004 and ZL6105. To enable manual override, the driver provides a
writeable module parameter, 'delay', which can be used to set the interval to
a value between 0 and 65,535 microseconds.
Intersil/Zilker Labs DC-DC controllers require a minimum interval between I2C
bus accesses. According to Intersil, the minimum interval is 2 ms, though 1 ms
appears to be sufficient and has not caused any problems in testing. The problem
is known to affect all currently supported chips. For manual override, the
driver provides a writeable module parameter, 'delay', which can be used to set
the interval to a value between 0 and 65,535 microseconds.
Sysfs entries
......
......@@ -200,17 +200,11 @@ static int zl6100_probe(struct i2c_client *client,
data->id = mid->driver_data;
/*
* ZL2005, ZL2008, ZL2105, and ZL6100 are known to require a wait time
* between I2C accesses. ZL2004 and ZL6105 are known to be safe.
* Other chips have not yet been tested.
*
* Only clear the wait time for chips known to be safe. The wait time
* can be cleared later for additional chips if tests show that it
* is not needed (in other words, better be safe than sorry).
* According to information from the chip vendor, all currently
* supported chips are known to require a wait time between I2C
* accesses.
*/
data->delay = delay;
if (data->id == zl2004 || data->id == zl6105)
data->delay = 0;
/*
* Since there was a direct I2C device access above, wait before
......
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