提交 fb1a2111 编写于 作者: A Arun Siluvery 提交者: Daniel Vetter

Revert "drm/i915: Initialize HWS page address after GPU reset"

This reverts commit 2e5356da.

It is now redundant as it is already covered in below commit which introduced
the changes to reuse initialization of resources in resume/reset path.

commit e84fe803
Author: Nick Hoath <nicholas.hoath@intel.com>
Date:   Fri Sep 11 12:53:46 2015 +0100

    drm/i915: Split alloc from init for lrc

lrc_setup_hardware_status_page() in the same function gen8_init_common_ring()
takes care of this.

Cc: Nick Hoath <nicholas.hoath@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Signed-off-by: NArun Siluvery <arun.siluvery@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1447951664-9347-1-git-send-email-arun.siluvery@linux.intel.comSigned-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
上级 54632abe
...@@ -1476,12 +1476,6 @@ static int gen8_init_common_ring(struct intel_engine_cs *ring) ...@@ -1476,12 +1476,6 @@ static int gen8_init_common_ring(struct intel_engine_cs *ring)
I915_WRITE_IMR(ring, ~(ring->irq_enable_mask | ring->irq_keep_mask)); I915_WRITE_IMR(ring, ~(ring->irq_enable_mask | ring->irq_keep_mask));
I915_WRITE(RING_HWSTAM(ring->mmio_base), 0xffffffff); I915_WRITE(RING_HWSTAM(ring->mmio_base), 0xffffffff);
if (ring->status_page.obj) {
I915_WRITE(RING_HWS_PGA(ring->mmio_base),
(u32)ring->status_page.gfx_addr);
POSTING_READ(RING_HWS_PGA(ring->mmio_base));
}
I915_WRITE(RING_MODE_GEN7(ring), I915_WRITE(RING_MODE_GEN7(ring),
_MASKED_BIT_DISABLE(GFX_REPLAY_MODE) | _MASKED_BIT_DISABLE(GFX_REPLAY_MODE) |
_MASKED_BIT_ENABLE(GFX_RUN_LIST_ENABLE)); _MASKED_BIT_ENABLE(GFX_RUN_LIST_ENABLE));
......
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