提交 fae06da4 编写于 作者: G George Cherian 提交者: Jakub Kicinski

octeontx2-af: Add devlink suppoort to af driver

Add devlink support to AF driver. Basic devlink support is added.
Currently info_get is the only supported devlink ops.

devlink ouptput looks like this
 # devlink dev
 pci/0002:01:00.0
 # devlink dev info
 pci/0002:01:00.0:
  driver octeontx2-af
 #
Signed-off-by: NSunil Kovvuri Goutham <sgoutham@marvell.com>
Signed-off-by: NJerin Jacob <jerinj@marvell.com>
Signed-off-by: NGeorge Cherian <george.cherian@marvell.com>
Signed-off-by: NJakub Kicinski <kuba@kernel.org>
上级 0e12c027
......@@ -9,6 +9,7 @@ config OCTEONTX2_MBOX
config OCTEONTX2_AF
tristate "Marvell OcteonTX2 RVU Admin Function driver"
select OCTEONTX2_MBOX
select NET_DEVLINK
depends on (64BIT && COMPILE_TEST) || ARM64
depends on PCI
help
......
......@@ -10,4 +10,4 @@ obj-$(CONFIG_OCTEONTX2_AF) += octeontx2_af.o
octeontx2_mbox-y := mbox.o rvu_trace.o
octeontx2_af-y := cgx.o rvu.o rvu_cgx.o rvu_npa.o rvu_nix.o \
rvu_reg.o rvu_npc.o rvu_debugfs.o ptp.o rvu_npc_fs.o \
rvu_cpt.o
rvu_cpt.o rvu_devlink.o
......@@ -2826,17 +2826,23 @@ static int rvu_probe(struct pci_dev *pdev, const struct pci_device_id *id)
if (err)
goto err_flr;
err = rvu_register_dl(rvu);
if (err)
goto err_irq;
rvu_setup_rvum_blk_revid(rvu);
/* Enable AF's VFs (if any) */
err = rvu_enable_sriov(rvu);
if (err)
goto err_irq;
goto err_dl;
/* Initialize debugfs */
rvu_dbg_init(rvu);
return 0;
err_dl:
rvu_unregister_dl(rvu);
err_irq:
rvu_unregister_interrupts(rvu);
err_flr:
......@@ -2868,6 +2874,7 @@ static void rvu_remove(struct pci_dev *pdev)
rvu_dbg_exit(rvu);
rvu_unregister_interrupts(rvu);
rvu_unregister_dl(rvu);
rvu_flr_wq_destroy(rvu);
rvu_cgx_exit(rvu);
rvu_fwdata_exit(rvu);
......
......@@ -12,7 +12,10 @@
#define RVU_H
#include <linux/pci.h>
#include <net/devlink.h>
#include "rvu_struct.h"
#include "rvu_devlink.h"
#include "common.h"
#include "mbox.h"
#include "npc.h"
......@@ -422,6 +425,7 @@ struct rvu {
#ifdef CONFIG_DEBUG_FS
struct rvu_debugfs rvu_dbg;
#endif
struct rvu_devlink *rvu_dl;
};
static inline void rvu_write64(struct rvu *rvu, u64 block, u64 offset, u64 val)
......
// SPDX-License-Identifier: GPL-2.0
/* Marvell OcteonTx2 RVU Devlink
*
* Copyright (C) 2020 Marvell.
*
*/
#include "rvu.h"
#define DRV_NAME "octeontx2-af"
static int rvu_devlink_info_get(struct devlink *devlink, struct devlink_info_req *req,
struct netlink_ext_ack *extack)
{
return devlink_info_driver_name_put(req, DRV_NAME);
}
static const struct devlink_ops rvu_devlink_ops = {
.info_get = rvu_devlink_info_get,
};
int rvu_register_dl(struct rvu *rvu)
{
struct rvu_devlink *rvu_dl;
struct devlink *dl;
int err;
rvu_dl = kzalloc(sizeof(*rvu_dl), GFP_KERNEL);
if (!rvu_dl)
return -ENOMEM;
dl = devlink_alloc(&rvu_devlink_ops, sizeof(struct rvu_devlink));
if (!dl) {
dev_warn(rvu->dev, "devlink_alloc failed\n");
kfree(rvu_dl);
return -ENOMEM;
}
err = devlink_register(dl, rvu->dev);
if (err) {
dev_err(rvu->dev, "devlink register failed with error %d\n", err);
devlink_free(dl);
kfree(rvu_dl);
return err;
}
rvu_dl->dl = dl;
rvu_dl->rvu = rvu;
rvu->rvu_dl = rvu_dl;
return 0;
}
void rvu_unregister_dl(struct rvu *rvu)
{
struct rvu_devlink *rvu_dl = rvu->rvu_dl;
struct devlink *dl = rvu_dl->dl;
if (!dl)
return;
devlink_unregister(dl);
devlink_free(dl);
kfree(rvu_dl);
}
/* SPDX-License-Identifier: GPL-2.0 */
/* Marvell OcteonTx2 RVU Devlink
*
* Copyright (C) 2020 Marvell.
*
*/
#ifndef RVU_DEVLINK_H
#define RVU_DEVLINK_H
struct rvu_devlink {
struct devlink *dl;
struct rvu *rvu;
};
/* Devlink APIs */
int rvu_register_dl(struct rvu *rvu);
void rvu_unregister_dl(struct rvu *rvu);
#endif /* RVU_DEVLINK_H */
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