提交 f9201325 编写于 作者: J Jitao Shi 提交者: CK Hu

dt-bindings: display: mediatek: update dsi supported chips

Update device tree binding documentation for the dsi for
Mediatek MT8183 SoCs.
Signed-off-by: NJitao Shi <jitao.shi@mediatek.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NCK Hu <ck.hu@mediatek.com>
上级 54ecb8f7
......@@ -7,7 +7,7 @@ channel output.
Required properties:
- compatible: "mediatek,<chip>-dsi"
the supported chips are mt2701 and mt8173.
the supported chips are mt2701, mt8173 and mt8183.
- reg: Physical base address and length of the controller's registers
- interrupts: The interrupt signal from the function block.
- clocks: device clocks
......@@ -26,7 +26,7 @@ The MIPI TX configuration module controls the MIPI D-PHY.
Required properties:
- compatible: "mediatek,<chip>-mipi-tx"
the supported chips are mt2701 and mt8173.
the supported chips are mt2701, mt8173 and mt8183.
- reg: Physical base address and length of the controller's registers
- clocks: PLL reference clock
- clock-output-names: name of the output clock line to the DSI encoder
......
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