提交 f8bdce3e 编写于 作者: M Maruthi Srinivas Bayyavarapu 提交者: Alex Deucher

drm/amdgpu: enable UVD clockgating in Polaris-10/11

UVD clocks are set to be disabled, when not in use.
Signed-off-by: NMaruthi Bayyavarapu <maruthi.bayyavarapu@amd.com>
Reviewed-by: NAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: NTom StDenis <Tom.StDenis@amd.com>
Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
上级 81c1514b
......@@ -934,12 +934,12 @@ static int vi_common_early_init(void *handle)
adev->external_rev_id = adev->rev_id + 0x14;
break;
case CHIP_POLARIS11:
adev->cg_flags = 0;
adev->cg_flags = AMD_CG_SUPPORT_UVD_MGCG;
adev->pg_flags = 0;
adev->external_rev_id = adev->rev_id + 0x5A;
break;
case CHIP_POLARIS10:
adev->cg_flags = 0;
adev->cg_flags = AMD_CG_SUPPORT_UVD_MGCG;
adev->pg_flags = 0;
adev->external_rev_id = adev->rev_id + 0x50;
break;
......
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