提交 f6d46a2e 编写于 作者: R Rasesh Mody 提交者: David S. Miller

bna: Remove Unused Code

Remove unused code.
Signed-off-by: NRasesh Mody <rmody@brocade.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>
上级 078086f3
...@@ -22,9 +22,6 @@ ...@@ -22,9 +22,6 @@
#include "bfi_cna.h" #include "bfi_cna.h"
#include "bfa_ioc.h" #include "bfa_ioc.h"
#define bfa_ioc_portid(__ioc) ((__ioc)->port_id)
#define bfa_lpuid(__arg) bfa_ioc_portid(&(__arg)->ioc)
static void bfa_cee_format_lldp_cfg(struct bfa_cee_lldp_cfg *lldp_cfg); static void bfa_cee_format_lldp_cfg(struct bfa_cee_lldp_cfg *lldp_cfg);
static void bfa_cee_format_cee_cfg(void *buffer); static void bfa_cee_format_cee_cfg(void *buffer);
......
...@@ -66,14 +66,6 @@ enum { ...@@ -66,14 +66,6 @@ enum {
#pragma pack(1) #pragma pack(1)
/**
* Check if 1-port card
*/
#define bfa_mfg_is_1port(type) (( \
(type) == BFA_MFG_TYPE_FC8P1 || \
(type) == BFA_MFG_TYPE_FC4P1 || \
(type) == BFA_MFG_TYPE_CNA10P1))
/** /**
* Check if Mezz card * Check if Mezz card
*/ */
......
...@@ -26,7 +26,6 @@ ...@@ -26,7 +26,6 @@
#define BFA_IOC_TOV 3000 /* msecs */ #define BFA_IOC_TOV 3000 /* msecs */
#define BFA_IOC_HWSEM_TOV 500 /* msecs */ #define BFA_IOC_HWSEM_TOV 500 /* msecs */
#define BFA_IOC_HB_TOV 500 /* msecs */ #define BFA_IOC_HB_TOV 500 /* msecs */
#define BFA_IOC_HWINIT_MAX 5
#define BFA_IOC_POLL_TOV 200 /* msecs */ #define BFA_IOC_POLL_TOV 200 /* msecs */
/** /**
...@@ -250,10 +249,6 @@ struct bfa_ioc_hwif { ...@@ -250,10 +249,6 @@ struct bfa_ioc_hwif {
#define bfa_ioc_stats_hb_count(_ioc, _hb_count) \ #define bfa_ioc_stats_hb_count(_ioc, _hb_count) \
((_ioc)->stats.hb_count = (_hb_count)) ((_ioc)->stats.hb_count = (_hb_count))
#define BFA_IOC_FWIMG_MINSZ (16 * 1024) #define BFA_IOC_FWIMG_MINSZ (16 * 1024)
#define BFA_IOC_FWIMG_TYPE(__ioc) \
(((__ioc)->ctdev) ? \
(((__ioc)->fcmode) ? BFI_IMAGE_CT_FC : BFI_IMAGE_CT_CNA) : \
BFI_IMAGE_CB_FC)
#define BFA_IOC_FW_SMEM_SIZE(__ioc) \ #define BFA_IOC_FW_SMEM_SIZE(__ioc) \
((bfa_ioc_asic_gen(__ioc) == BFI_ASIC_GEN_CB) \ ((bfa_ioc_asic_gen(__ioc) == BFI_ASIC_GEN_CB) \
? BFI_SMEM_CB_SIZE : BFI_SMEM_CT_SIZE) ? BFI_SMEM_CB_SIZE : BFI_SMEM_CT_SIZE)
......
...@@ -15,7 +15,6 @@ ...@@ -15,7 +15,6 @@
* All rights reserved * All rights reserved
* www.brocade.com * www.brocade.com
*/ */
#ifndef __BFI_H__ #ifndef __BFI_H__
#define __BFI_H__ #define __BFI_H__
...@@ -28,12 +27,6 @@ ...@@ -28,12 +27,6 @@
*/ */
#define BFI_FLASH_CHUNK_SZ 256 /*!< Flash chunk size */ #define BFI_FLASH_CHUNK_SZ 256 /*!< Flash chunk size */
#define BFI_FLASH_CHUNK_SZ_WORDS (BFI_FLASH_CHUNK_SZ/sizeof(u32)) #define BFI_FLASH_CHUNK_SZ_WORDS (BFI_FLASH_CHUNK_SZ/sizeof(u32))
enum {
BFI_IMAGE_CB_FC,
BFI_IMAGE_CT_FC,
BFI_IMAGE_CT_CNA,
BFI_IMAGE_MAX,
};
/** /**
* Msg header common to all msgs * Msg header common to all msgs
...@@ -195,15 +188,6 @@ enum bfi_mclass { ...@@ -195,15 +188,6 @@ enum bfi_mclass {
#define BFI_IOC_MAX_CQS_ASIC 8 #define BFI_IOC_MAX_CQS_ASIC 8
#define BFI_IOC_MSGLEN_MAX 32 /* 32 bytes */ #define BFI_IOC_MSGLEN_MAX 32 /* 32 bytes */
#define BFI_BOOT_TYPE_OFF 8
#define BFI_BOOT_LOADER_OFF 12
#define BFI_BOOT_TYPE_NORMAL 0
#define BFI_BOOT_TYPE_FLASH 1
#define BFI_BOOT_TYPE_MEMTEST 2
#define BFI_BOOT_LOADER_OS 0
#define BFI_FWBOOT_ENV_OS 0 #define BFI_FWBOOT_ENV_OS 0
#define BFI_BOOT_MEMTEST_RES_ADDR 0x900 #define BFI_BOOT_MEMTEST_RES_ADDR 0x900
...@@ -344,12 +328,6 @@ enum bfi_port_mode { ...@@ -344,12 +328,6 @@ enum bfi_port_mode {
/** /**
* BFI_IOC_I2H_READY_EVENT message * BFI_IOC_I2H_READY_EVENT message
*/ */
struct bfi_ioc_rdy_event {
struct bfi_mhdr mh; /*!< common msg header */
u8 init_status; /*!< init event status */
u8 rsvd[3];
};
struct bfi_ioc_hbeat { struct bfi_ioc_hbeat {
struct bfi_mhdr mh; /*!< common msg header */ struct bfi_mhdr mh; /*!< common msg header */
u32 hb_count; /*!< current heart beat count */ u32 hb_count; /*!< current heart beat count */
......
...@@ -32,14 +32,6 @@ extern const u32 bna_napi_dim_vector[][BNA_BIAS_T_MAX]; ...@@ -32,14 +32,6 @@ extern const u32 bna_napi_dim_vector[][BNA_BIAS_T_MAX];
/* Log string size */ /* Log string size */
#define BNA_MESSAGE_SIZE 256 #define BNA_MESSAGE_SIZE 256
/* MBOX API for PORT, TX, RX */
#define bna_mbox_qe_fill(_qe, _cmd, _cmd_len, _cbfn, _cbarg) \
do { \
memcpy(&((_qe)->cmd.msg[0]), (_cmd), (_cmd_len)); \
(_qe)->cbfn = (_cbfn); \
(_qe)->cbarg = (_cbarg); \
} while (0)
#define bna_is_small_rxq(_id) ((_id) & 0x1) #define bna_is_small_rxq(_id) ((_id) & 0x1)
#define BNA_MAC_IS_EQUAL(_mac1, _mac2) \ #define BNA_MAC_IS_EQUAL(_mac1, _mac2) \
...@@ -177,32 +169,6 @@ do { \ ...@@ -177,32 +169,6 @@ do { \
#define BNA_Q_IN_USE_COUNT(_q_ptr) \ #define BNA_Q_IN_USE_COUNT(_q_ptr) \
(BNA_QE_IN_USE_CNT(&(_q_ptr)->q, (_q_ptr)->q.q_depth)) (BNA_QE_IN_USE_CNT(&(_q_ptr)->q, (_q_ptr)->q.q_depth))
/* These macros build the data portion of the TxQ/RxQ doorbell */
#define BNA_DOORBELL_Q_PRD_IDX(_pi) (0x80000000 | (_pi))
#define BNA_DOORBELL_Q_STOP (0x40000000)
/* These macros build the data portion of the IB doorbell */
#define BNA_DOORBELL_IB_INT_ACK(_timeout, _events) \
(0x80000000 | ((_timeout) << 16) | (_events))
#define BNA_DOORBELL_IB_INT_DISABLE (0x40000000)
/* Set the coalescing timer for the given ib */
#define bna_ib_coalescing_timer_set(_i_dbell, _cls_timer) \
((_i_dbell)->doorbell_ack = BNA_DOORBELL_IB_INT_ACK((_cls_timer), 0));
/* Acks 'events' # of events for a given ib */
#define bna_ib_ack(_i_dbell, _events) \
(writel(((_i_dbell)->doorbell_ack | (_events)), \
(_i_dbell)->doorbell_addr));
#define bna_txq_prod_indx_doorbell(_tcb) \
(writel(BNA_DOORBELL_Q_PRD_IDX((_tcb)->producer_index), \
(_tcb)->q_dbell));
#define bna_rxq_prod_indx_doorbell(_rcb) \
(writel(BNA_DOORBELL_Q_PRD_IDX((_rcb)->producer_index), \
(_rcb)->q_dbell));
#define BNA_LARGE_PKT_SIZE 1000 #define BNA_LARGE_PKT_SIZE 1000
#define BNA_UPDATE_PKT_CNT(_pkt, _len) \ #define BNA_UPDATE_PKT_CNT(_pkt, _len) \
...@@ -435,7 +401,6 @@ void bna_get_perm_mac(struct bna *bna, u8 *mac); ...@@ -435,7 +401,6 @@ void bna_get_perm_mac(struct bna *bna, u8 *mac);
void bna_hw_stats_get(struct bna *bna); void bna_hw_stats_get(struct bna *bna);
/* APIs for Rx */ /* APIs for Rx */
int bna_rit_mod_can_satisfy(struct bna_rit_mod *rit_mod, int seg_size);
/* APIs for RxF */ /* APIs for RxF */
struct bna_mac *bna_ucam_mod_mac_get(struct bna_ucam_mod *ucam_mod); struct bna_mac *bna_ucam_mod_mac_get(struct bna_ucam_mod *ucam_mod);
...@@ -447,53 +412,13 @@ void bna_mcam_mod_mac_put(struct bna_mcam_mod *mcam_mod, ...@@ -447,53 +412,13 @@ void bna_mcam_mod_mac_put(struct bna_mcam_mod *mcam_mod,
struct bna_mcam_handle *bna_mcam_mod_handle_get(struct bna_mcam_mod *mod); struct bna_mcam_handle *bna_mcam_mod_handle_get(struct bna_mcam_mod *mod);
void bna_mcam_mod_handle_put(struct bna_mcam_mod *mcam_mod, void bna_mcam_mod_handle_put(struct bna_mcam_mod *mcam_mod,
struct bna_mcam_handle *handle); struct bna_mcam_handle *handle);
struct bna_rit_segment *
bna_rit_mod_seg_get(struct bna_rit_mod *rit_mod, int seg_size);
void bna_rit_mod_seg_put(struct bna_rit_mod *rit_mod,
struct bna_rit_segment *seg);
/**
* DEVICE
*/
/* APIs for BNAD */
void bna_device_enable(struct bna_device *device);
void bna_device_disable(struct bna_device *device,
enum bna_cleanup_type type);
/** /**
* MBOX * MBOX
*/ */
/* APIs for PORT, TX, RX */
void bna_mbox_handler(struct bna *bna, u32 intr_status);
void bna_mbox_send(struct bna *bna, struct bna_mbox_qe *mbox_qe);
/**
* PORT
*/
/* API for RX */
int bna_port_mtu_get(struct bna_port *port);
void bna_llport_rx_started(struct bna_llport *llport);
void bna_llport_rx_stopped(struct bna_llport *llport);
/* API for BNAD */ /* API for BNAD */
void bna_port_enable(struct bna_port *port); void bna_mbox_handler(struct bna *bna, u32 intr_status);
void bna_port_disable(struct bna_port *port, enum bna_cleanup_type type,
void (*cbfn)(void *, enum bna_cb_status));
void bna_port_pause_config(struct bna_port *port,
struct bna_pause_config *pause_config,
void (*cbfn)(struct bnad *, enum bna_cb_status));
void bna_port_mtu_set(struct bna_port *port, int mtu,
void (*cbfn)(struct bnad *, enum bna_cb_status));
void bna_port_mac_get(struct bna_port *port, mac_t *mac);
/* Callbacks for TX, RX */
void bna_port_cb_tx_stopped(struct bna_port *port,
enum bna_cb_status status);
void bna_port_cb_rx_stopped(struct bna_port *port,
enum bna_cb_status status);
/** /**
* ETHPORT * ETHPORT
...@@ -503,15 +428,6 @@ void bna_port_cb_rx_stopped(struct bna_port *port, ...@@ -503,15 +428,6 @@ void bna_port_cb_rx_stopped(struct bna_port *port,
void bna_ethport_cb_rx_started(struct bna_ethport *ethport); void bna_ethport_cb_rx_started(struct bna_ethport *ethport);
void bna_ethport_cb_rx_stopped(struct bna_ethport *ethport); void bna_ethport_cb_rx_stopped(struct bna_ethport *ethport);
/**
* IB
*/
/* APIs for BNA */
void bna_ib_mod_init(struct bna_ib_mod *ib_mod, struct bna *bna,
struct bna_res_info *res_info);
void bna_ib_mod_uninit(struct bna_ib_mod *ib_mod);
/** /**
* TX MODULE AND TX * TX MODULE AND TX
*/ */
...@@ -526,14 +442,11 @@ void bna_bfi_bw_update_aen(struct bna_tx_mod *tx_mod); ...@@ -526,14 +442,11 @@ void bna_bfi_bw_update_aen(struct bna_tx_mod *tx_mod);
void bna_tx_mod_init(struct bna_tx_mod *tx_mod, struct bna *bna, void bna_tx_mod_init(struct bna_tx_mod *tx_mod, struct bna *bna,
struct bna_res_info *res_info); struct bna_res_info *res_info);
void bna_tx_mod_uninit(struct bna_tx_mod *tx_mod); void bna_tx_mod_uninit(struct bna_tx_mod *tx_mod);
int bna_tx_state_get(struct bna_tx *tx);
/* APIs for ENET */ /* APIs for ENET */
void bna_tx_mod_start(struct bna_tx_mod *tx_mod, enum bna_tx_type type); void bna_tx_mod_start(struct bna_tx_mod *tx_mod, enum bna_tx_type type);
void bna_tx_mod_stop(struct bna_tx_mod *tx_mod, enum bna_tx_type type); void bna_tx_mod_stop(struct bna_tx_mod *tx_mod, enum bna_tx_type type);
void bna_tx_mod_fail(struct bna_tx_mod *tx_mod); void bna_tx_mod_fail(struct bna_tx_mod *tx_mod);
void bna_tx_mod_prio_changed(struct bna_tx_mod *tx_mod, int prio);
void bna_tx_mod_cee_link_status(struct bna_tx_mod *tx_mod, int cee_link);
/* APIs for BNAD */ /* APIs for BNAD */
void bna_tx_res_req(int num_txq, int txq_depth, void bna_tx_res_req(int num_txq, int txq_depth,
...@@ -553,27 +466,6 @@ void bna_tx_coalescing_timeo_set(struct bna_tx *tx, int coalescing_timeo); ...@@ -553,27 +466,6 @@ void bna_tx_coalescing_timeo_set(struct bna_tx *tx, int coalescing_timeo);
* RX MODULE, RX, RXF * RX MODULE, RX, RXF
*/ */
/* Internal APIs */
void rxf_cb_cam_fltr_mbox_cmd(void *arg, int status);
void rxf_cam_mbox_cmd(struct bna_rxf *rxf, u8 cmd,
const struct bna_mac *mac_addr);
void __rxf_vlan_filter_set(struct bna_rxf *rxf, enum bna_status status);
void bna_rxf_adv_init(struct bna_rxf *rxf,
struct bna_rx *rx,
struct bna_rx_config *q_config);
int rxf_process_packet_filter_ucast(struct bna_rxf *rxf);
int rxf_process_packet_filter_promisc(struct bna_rxf *rxf);
int rxf_process_packet_filter_default(struct bna_rxf *rxf);
int rxf_process_packet_filter_allmulti(struct bna_rxf *rxf);
int rxf_clear_packet_filter_ucast(struct bna_rxf *rxf);
int rxf_clear_packet_filter_promisc(struct bna_rxf *rxf);
int rxf_clear_packet_filter_default(struct bna_rxf *rxf);
int rxf_clear_packet_filter_allmulti(struct bna_rxf *rxf);
void rxf_reset_packet_filter_ucast(struct bna_rxf *rxf);
void rxf_reset_packet_filter_promisc(struct bna_rxf *rxf);
void rxf_reset_packet_filter_default(struct bna_rxf *rxf);
void rxf_reset_packet_filter_allmulti(struct bna_rxf *rxf);
/* FW response handlers */ /* FW response handlers */
void bna_bfi_rx_enet_start_rsp(struct bna_rx *rx, void bna_bfi_rx_enet_start_rsp(struct bna_rx *rx,
struct bfi_msgq_mhdr *msghdr); struct bfi_msgq_mhdr *msghdr);
...@@ -587,8 +479,6 @@ void bna_bfi_rxf_mcast_add_rsp(struct bna_rxf *rxf, ...@@ -587,8 +479,6 @@ void bna_bfi_rxf_mcast_add_rsp(struct bna_rxf *rxf,
void bna_rx_mod_init(struct bna_rx_mod *rx_mod, struct bna *bna, void bna_rx_mod_init(struct bna_rx_mod *rx_mod, struct bna *bna,
struct bna_res_info *res_info); struct bna_res_info *res_info);
void bna_rx_mod_uninit(struct bna_rx_mod *rx_mod); void bna_rx_mod_uninit(struct bna_rx_mod *rx_mod);
int bna_rx_state_get(struct bna_rx *rx);
int bna_rxf_state_get(struct bna_rxf *rxf);
/* APIs for ENET */ /* APIs for ENET */
void bna_rx_mod_start(struct bna_rx_mod *rx_mod, enum bna_rx_type type); void bna_rx_mod_start(struct bna_rx_mod *rx_mod, enum bna_rx_type type);
...@@ -687,14 +577,4 @@ void bnad_cb_mbox_intr_disable(struct bnad *bnad); ...@@ -687,14 +577,4 @@ void bnad_cb_mbox_intr_disable(struct bnad *bnad);
void bnad_cb_stats_get(struct bnad *bnad, enum bna_cb_status status, void bnad_cb_stats_get(struct bnad *bnad, enum bna_cb_status status,
struct bna_stats *stats); struct bna_stats *stats);
/* Callbacks for DEVICE */
void bnad_cb_device_enabled(struct bnad *bnad, enum bna_cb_status status);
void bnad_cb_device_disabled(struct bnad *bnad, enum bna_cb_status status);
void bnad_cb_device_enable_mbox_intr(struct bnad *bnad);
void bnad_cb_device_disable_mbox_intr(struct bnad *bnad);
/* Callbacks for port */
void bnad_cb_port_link_status(struct bnad *bnad,
enum bna_link_status status);
#endif /* __BNA_H__ */ #endif /* __BNA_H__ */
...@@ -37,7 +37,6 @@ struct bna_rxq; ...@@ -37,7 +37,6 @@ struct bna_rxq;
struct bna_cq; struct bna_cq;
struct bna_rx; struct bna_rx;
struct bna_rxf; struct bna_rxf;
struct bna_port;
struct bna_enet; struct bna_enet;
struct bna; struct bna;
struct bnad; struct bnad;
...@@ -90,21 +89,6 @@ enum bna_res_req_type { ...@@ -90,21 +89,6 @@ enum bna_res_req_type {
BNA_RES_MEM_T_ATTR = 1, BNA_RES_MEM_T_ATTR = 1,
BNA_RES_MEM_T_FWTRC = 2, BNA_RES_MEM_T_FWTRC = 2,
BNA_RES_MEM_T_STATS = 3, BNA_RES_MEM_T_STATS = 3,
BNA_RES_MEM_T_SWSTATS = 4,
BNA_RES_MEM_T_IBIDX = 5,
BNA_RES_MEM_T_IB_ARRAY = 6,
BNA_RES_MEM_T_INTR_ARRAY = 7,
BNA_RES_MEM_T_IDXSEG_ARRAY = 8,
BNA_RES_MEM_T_TX_ARRAY = 9,
BNA_RES_MEM_T_TXQ_ARRAY = 10,
BNA_RES_MEM_T_RX_ARRAY = 11,
BNA_RES_MEM_T_RXP_ARRAY = 12,
BNA_RES_MEM_T_RXQ_ARRAY = 13,
BNA_RES_MEM_T_UCMAC_ARRAY = 14,
BNA_RES_MEM_T_MCMAC_ARRAY = 15,
BNA_RES_MEM_T_RIT_ENTRY = 16,
BNA_RES_MEM_T_RIT_SEGMENT = 17,
BNA_RES_INTR_T_MBOX = 18,
BNA_RES_T_MAX BNA_RES_T_MAX
}; };
...@@ -150,11 +134,6 @@ enum bna_rx_mem_type { ...@@ -150,11 +134,6 @@ enum bna_rx_mem_type {
BNA_RX_RES_T_MAX = 15 BNA_RX_RES_T_MAX = 15
}; };
enum bna_mbox_state {
BNA_MBOX_FREE = 0,
BNA_MBOX_POSTED = 1
};
enum bna_tx_type { enum bna_tx_type {
BNA_TX_T_REGULAR = 0, BNA_TX_T_REGULAR = 0,
BNA_TX_T_LOOPBACK = 1, BNA_TX_T_LOOPBACK = 1,
...@@ -200,14 +179,6 @@ enum bna_rx_event { ...@@ -200,14 +179,6 @@ enum bna_rx_event {
RX_E_CLEANUP_DONE = 8, RX_E_CLEANUP_DONE = 8,
}; };
enum bna_rx_state {
BNA_RX_STOPPED = 1,
BNA_RX_RXF_START_WAIT = 2,
BNA_RX_STARTED = 3,
BNA_RX_RXF_STOP_WAIT = 4,
BNA_RX_RXQ_STOP_WAIT = 5,
};
enum bna_rx_flags { enum bna_rx_flags {
BNA_RX_F_ENET_STARTED = 1, BNA_RX_F_ENET_STARTED = 1,
BNA_RX_F_ENABLED = 2, BNA_RX_F_ENABLED = 2,
...@@ -218,11 +189,6 @@ enum bna_rx_mod_flags { ...@@ -218,11 +189,6 @@ enum bna_rx_mod_flags {
BNA_RX_MOD_F_ENET_LOOPBACK = 2, BNA_RX_MOD_F_ENET_LOOPBACK = 2,
}; };
enum bna_rxf_oper_state {
BNA_RXF_OPER_STATE_RUNNING = 0x01, /* rxf operational */
BNA_RXF_OPER_STATE_PAUSED = 0x02, /* rxf in PAUSED state */
};
enum bna_rxf_flags { enum bna_rxf_flags {
BNA_RXF_F_PAUSED = 1, BNA_RXF_F_PAUSED = 1,
}; };
...@@ -237,24 +203,6 @@ enum bna_rxf_event { ...@@ -237,24 +203,6 @@ enum bna_rxf_event {
RXF_E_FW_RESP = 7, RXF_E_FW_RESP = 7,
}; };
enum bna_rxf_state {
BNA_RXF_STOPPED = 1,
BNA_RXF_START_WAIT = 2,
BNA_RXF_CAM_FLTR_MOD_WAIT = 3,
BNA_RXF_STARTED = 4,
BNA_RXF_CAM_FLTR_CLR_WAIT = 5,
BNA_RXF_STOP_WAIT = 6,
BNA_RXF_PAUSE_WAIT = 7,
BNA_RXF_RESUME_WAIT = 8,
BNA_RXF_STAT_CLR_WAIT = 9,
};
enum bna_port_type {
BNA_PORT_T_REGULAR = 0,
BNA_PORT_T_LOOPBACK_INTERNAL = 1,
BNA_PORT_T_LOOPBACK_EXTERNAL = 2,
};
enum bna_enet_type { enum bna_enet_type {
BNA_ENET_T_REGULAR = 0, BNA_ENET_T_REGULAR = 0,
BNA_ENET_T_LOOPBACK_INTERNAL = 1, BNA_ENET_T_LOOPBACK_INTERNAL = 1,
...@@ -267,25 +215,12 @@ enum bna_link_status { ...@@ -267,25 +215,12 @@ enum bna_link_status {
BNA_CEE_UP = 2 BNA_CEE_UP = 2
}; };
enum bna_llport_flags {
BNA_LLPORT_F_ADMIN_UP = 1,
BNA_LLPORT_F_PORT_ENABLED = 2,
BNA_LLPORT_F_RX_STARTED = 4
};
enum bna_ethport_flags { enum bna_ethport_flags {
BNA_ETHPORT_F_ADMIN_UP = 1, BNA_ETHPORT_F_ADMIN_UP = 1,
BNA_ETHPORT_F_PORT_ENABLED = 2, BNA_ETHPORT_F_PORT_ENABLED = 2,
BNA_ETHPORT_F_RX_STARTED = 4, BNA_ETHPORT_F_RX_STARTED = 4,
}; };
enum bna_port_flags {
BNA_PORT_F_DEVICE_READY = 1,
BNA_PORT_F_ENABLED = 2,
BNA_PORT_F_PAUSE_CHANGED = 4,
BNA_PORT_F_MTU_CHANGED = 8
};
enum bna_enet_flags { enum bna_enet_flags {
BNA_ENET_F_IOCETH_READY = 1, BNA_ENET_F_IOCETH_READY = 1,
BNA_ENET_F_ENABLED = 2, BNA_ENET_F_ENABLED = 2,
...@@ -418,32 +353,7 @@ struct bna_ioceth { ...@@ -418,32 +353,7 @@ struct bna_ioceth {
/** /**
* *
* Mail box * Enet
*
*/
struct bna_mbox_qe {
/* This should be the first one */
struct list_head qe;
struct bfa_mbox_cmd cmd;
u32 cmd_len;
/* Callback for port, tx, rx, rxf */
void (*cbfn)(void *arg, int status);
void *cbarg;
};
struct bna_mbox_mod {
enum bna_mbox_state state;
struct list_head posted_q;
u32 msg_pending;
u32 msg_ctr;
struct bna *bna;
};
/**
*
* Port
* *
*/ */
...@@ -453,60 +363,6 @@ struct bna_pause_config { ...@@ -453,60 +363,6 @@ struct bna_pause_config {
enum bna_status rx_pause; enum bna_status rx_pause;
}; };
struct bna_llport {
bfa_fsm_t fsm;
enum bna_llport_flags flags;
enum bna_port_type type;
enum bna_link_status link_status;
int rx_started_count;
void (*stop_cbfn)(struct bna_port *, enum bna_cb_status);
struct bna_mbox_qe mbox_qe;
struct bna *bna;
};
struct bna_port {
bfa_fsm_t fsm;
enum bna_port_flags flags;
enum bna_port_type type;
struct bna_llport llport;
struct bna_pause_config pause_config;
u8 priority;
int mtu;
/* Callback for bna_port_disable(), port_stop() */
void (*stop_cbfn)(void *, enum bna_cb_status);
void *stop_cbarg;
/* Callback for bna_port_pause_config() */
void (*pause_cbfn)(struct bnad *, enum bna_cb_status);
/* Callback for bna_port_mtu_set() */
void (*mtu_cbfn)(struct bnad *, enum bna_cb_status);
void (*link_cbfn)(struct bnad *, enum bna_link_status);
struct bfa_wc chld_stop_wc;
struct bna_mbox_qe mbox_qe;
struct bna *bna;
};
/**
*
* Enet
*
*/
struct bna_enet { struct bna_enet {
bfa_fsm_t fsm; bfa_fsm_t fsm;
enum bna_enet_flags flags; enum bna_enet_flags flags;
...@@ -569,27 +425,6 @@ struct bna_ethport { ...@@ -569,27 +425,6 @@ struct bna_ethport {
* *
*/ */
/* IB index segment structure */
struct bna_ibidx_seg {
/* This should be the first one */
struct list_head qe;
u8 ib_seg_size;
u8 ib_idx_tbl_offset;
};
/* Interrupt structure */
struct bna_intr {
/* This should be the first one */
struct list_head qe;
int ref_count;
enum bna_intr_type intr_type;
int vector;
struct bna_ib *ib;
};
/* Doorbell structure */ /* Doorbell structure */
struct bna_ib_dbell { struct bna_ib_dbell {
void *__iomem doorbell_addr; void *__iomem doorbell_addr;
...@@ -750,33 +585,6 @@ struct bna_tx_mod { ...@@ -750,33 +585,6 @@ struct bna_tx_mod {
struct bna *bna; struct bna *bna;
}; };
/**
*
* Receive Indirection Table
*
*/
/* One row of RIT table */
struct bna_rit_entry {
u8 large_rxq_id; /* used for either large or data buffers */
u8 small_rxq_id; /* used for either small or header buffers */
};
/* RIT segment */
struct bna_rit_segment {
struct list_head qe;
u32 rit_offset;
u32 rit_size;
/**
* max_rit_size: Varies per RIT segment depending on how RIT is
* partitioned
*/
u32 max_rit_size;
struct bna_rit_entry *rit;
};
/** /**
* *
* Rx object * Rx object
...@@ -1123,42 +931,6 @@ struct bna_mcam_mod { ...@@ -1123,42 +931,6 @@ struct bna_mcam_mod {
* *
*/ */
struct bna_tx_stats {
int tx_state;
int tx_flags;
int num_txqs;
u32 txq_bmap[2];
int txf_id;
};
struct bna_rx_stats {
int rx_state;
int rx_flags;
int num_rxps;
int num_rxqs;
u32 rxq_bmap[2];
u32 cq_bmap[2];
int rxf_id;
int rxf_state;
int rxf_oper_state;
int num_active_ucast;
int num_active_mcast;
int rxmode_active;
int vlan_filter_status;
int rss_status;
int hds_status;
};
struct bna_sw_stats {
int device_state;
int port_state;
int port_flags;
int llport_state;
int priority;
int num_active_tx;
int num_active_rx;
};
struct bna_stats { struct bna_stats {
struct bna_dma_addr hw_stats_dma; struct bna_dma_addr hw_stats_dma;
struct bfi_enet_stats *hw_stats_kva; struct bfi_enet_stats *hw_stats_kva;
......
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