x86/cpu: Fix core name for Sapphire Rapids

mainline inclusion
from mainline-v5.14-rc2
commit 28188cc4
category: feature
feature: SPR PMU uncore support
bugzilla: https://gitee.com/openeuler/intel-kernel/issues/I5BECO

Intel-SIG: commit 28188cc4 x86/cpu: Fix core name for Sapphire
Rapids
This commit is backported as a dependency for SPR PMU uncore support.

-------------------------------------

Sapphire Rapids uses Golden Cove, not Willow Cove.

Fixes: 53375a5a ("x86/cpu: Resort and comment Intel models")
Signed-off-by: NAndi Kleen <ak@linux.intel.com>
Signed-off-by: NBorislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20210513163904.3083274-1-ak@linux.intel.comSigned-off-by: NYunying Sun <yunying.sun@intel.com>

arch/x86/include/asm/intel-family.h

@@ -100,7 +100,8 @@
 
 #define INTEL_FAM6_TIGERLAKE_L		0x8C	/* Willow Cove */
 #define INTEL_FAM6_TIGERLAKE		0x8D	/* Willow Cove */
-#define INTEL_FAM6_SAPPHIRERAPIDS_X	0x8F	/* Willow Cove */
+
+#define INTEL_FAM6_SAPPHIRERAPIDS_X	0x8F	/* Golden Cove */
 
 #define INTEL_FAM6_ALDERLAKE		0x97	/* Golden Cove / Gracemont */
 #define INTEL_FAM6_ALDERLAKE_L		0x9A	/* Golden Cove / Gracemont */