提交 f3d80deb 编写于 作者: A Anson Huang 提交者: Shawn Guo

ARM: dts: imx: add cooling-cells for cpufreq cooling device

Add #cooling-cells for i.MX6/7 SoCs for cpufreq cooling device usage.
Signed-off-by: NAnson Huang <Anson.Huang@nxp.com>
Signed-off-by: NBastian Stender <bst@pengutronix.de>
Signed-off-by: NShawn Guo <shawnguo@kernel.org>
上级 328bd825
......@@ -33,6 +33,7 @@
396000 1175000
>;
clock-latency = <61036>; /* two CLK32 periods */
#cooling-cells = <2>;
clocks = <&clks IMX6QDL_CLK_ARM>,
<&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
<&clks IMX6QDL_CLK_STEP>,
......
......@@ -38,6 +38,7 @@
396000 1175000
>;
clock-latency = <61036>; /* two CLK32 periods */
#cooling-cells = <2>;
clocks = <&clks IMX6QDL_CLK_ARM>,
<&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
<&clks IMX6QDL_CLK_STEP>,
......
......@@ -60,6 +60,7 @@
396000 1175000
>;
clock-latency = <61036>; /* two CLK32 periods */
#cooling-cells = <2>;
clocks = <&clks IMX6SL_CLK_ARM>, <&clks IMX6SL_CLK_PLL2_PFD2>,
<&clks IMX6SL_CLK_STEP>, <&clks IMX6SL_CLK_PLL1_SW>,
<&clks IMX6SL_CLK_PLL1_SYS>;
......
......@@ -79,6 +79,7 @@
198000 1175000
>;
clock-latency = <61036>; /* two CLK32 periods */
#cooling-cells = <2>;
clocks = <&clks IMX6SX_CLK_ARM>,
<&clks IMX6SX_CLK_PLL2_PFD2>,
<&clks IMX6SX_CLK_STEP>,
......
......@@ -62,6 +62,7 @@
device_type = "cpu";
reg = <0>;
clock-latency = <61036>; /* two CLK32 periods */
#cooling-cells = <2>;
operating-points = <
/* kHz uV */
696000 1275000
......
......@@ -11,6 +11,7 @@
cpu0: cpu@0 {
clock-frequency = <996000000>;
operating-points-v2 = <&cpu0_opp_table>;
#cooling-cells = <2>;
};
cpu1: cpu@1 {
......
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