提交 ef5a6a75 编写于 作者: S Senthil Balasubramanian 提交者: John W. Linville

ath9k_hw: Initialize 2GHz CTL properly.

The last 2GHz CTL was not being initialized, so power was being
set to 0 instead of 30dbm. Initialize to 30 like other CTLs.
Signed-off-by: NSenthil Balasubramanian <senthilkumar@atheros.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
上级 b3dd6bc1
...@@ -306,6 +306,7 @@ static const struct ar9300_eeprom ar9300_default = { ...@@ -306,6 +306,7 @@ static const struct ar9300_eeprom ar9300_default = {
{ { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
{ { {60, 0}, {60, 1}, {60, 1}, {60, 1} } }, { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
{ { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
}, },
.modalHeader5G = { .modalHeader5G = {
/* 4 idle,t1,t2,b (4 bits per setting) */ /* 4 idle,t1,t2,b (4 bits per setting) */
......
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