“8020919a9b99d6c990dc6a50e8215e291fbbe5a6”上不存在“git@gitcode.net:openeuler/kernel.git”
提交 eed6c63c 编写于 作者: S Seungwon Jeon 提交者: Chris Ball

mmc: dw_mmc: fix the transmission handling in IDMAC

DTO interrupt can be later than transmit interrupt(IDMAC) in case of
write. Current handling of IDMAC interrupt sets EVENT_DATA_COMPLETE as
well as EVENT_XFER_COMPLETE regardless of DTO rising. This makes the
current request finish in tasklet and permits the next request even
though current data transfer is still in progress. As a result, sequence
is broken and lock-up happens. Setting EVENT_DATA_COMPLETE is not proper
after IDMAC interrupt. It should be taken after DTO interrupt is
generated.
Reported-by: NDmitry Shmidt <dimitrysh@android.com>
Signed-off-by: NSeungwon Jeon <tgih.jun@samsung.com>
Signed-off-by: NHyeonsu Kim <hyeonsu.kim@samsung.com>
Acked-by: NWill Newton <will.newton@imgtec.com>
Signed-off-by: NChris Ball <cjb@laptop.org>
上级 2a0fe914
...@@ -1623,7 +1623,6 @@ static irqreturn_t dw_mci_interrupt(int irq, void *dev_id) ...@@ -1623,7 +1623,6 @@ static irqreturn_t dw_mci_interrupt(int irq, void *dev_id)
if (pending & (SDMMC_IDMAC_INT_TI | SDMMC_IDMAC_INT_RI)) { if (pending & (SDMMC_IDMAC_INT_TI | SDMMC_IDMAC_INT_RI)) {
mci_writel(host, IDSTS, SDMMC_IDMAC_INT_TI | SDMMC_IDMAC_INT_RI); mci_writel(host, IDSTS, SDMMC_IDMAC_INT_TI | SDMMC_IDMAC_INT_RI);
mci_writel(host, IDSTS, SDMMC_IDMAC_INT_NI); mci_writel(host, IDSTS, SDMMC_IDMAC_INT_NI);
set_bit(EVENT_DATA_COMPLETE, &host->pending_events);
host->dma_ops->complete(host); host->dma_ops->complete(host);
} }
#endif #endif
......
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