提交 ee47fd12 编写于 作者: J Jarkko Nikula 提交者: Takashi Iwai

[ALSA] ASoC: Fix TLV320AIC3X PLL divider table for 64 kHz rate

Signed-off-by: NJarkko Nikula <jarkko.nikula@nokia.com>
Signed-off-by: NTakashi Iwai <tiwai@suse.de>
上级 b84f08d4
......@@ -681,8 +681,8 @@ static const struct aic3x_rate_divs aic3x_divs[] = {
{22579200, 48000, 48000, 0x0, 8, 7075},
{33868800, 48000, 48000, 0x0, 5, 8049},
/* 64k */
{22579200, 96000, 96000, 0x1, 8, 7075},
{33868800, 96000, 96000, 0x1, 5, 8049},
{22579200, 64000, 96000, 0x1, 8, 7075},
{33868800, 64000, 96000, 0x1, 5, 8049},
/* 88.2k */
{22579200, 88200, 88200, 0x0, 8, 0},
{33868800, 88200, 88200, 0x0, 5, 3333},
......
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