提交 ed60453f 编写于 作者: R Rabin Vincent 提交者: Russell King

ARM: 6511/1: ftrace: add ARM support for C version of recordmcount

Depending on the compiler version, ARM GCC calls the mcount function
either __gnu_mcount_nc or mcount.
Acked-by: NSteven Rostedt <rostedt@goodmis.org>
Signed-off-by: NRabin Vincent <rabin@rab.in>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
上级 cd3478f2
......@@ -23,6 +23,7 @@ config ARM
select PERF_USE_VMALLOC
select HAVE_REGS_AND_STACK_ACCESS_API
select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V7))
select HAVE_C_RECORDMCOUNT
help
The ARM series is a line of low-power-consumption RISC chip designs
licensed by ARM Ltd and targeted at embedded applications and
......
......@@ -38,6 +38,7 @@ static void *ehdr_curr; /* current ElfXX_Ehdr * for resource cleanup */
static char gpfx; /* prefix for global symbol name (sometimes '_') */
static struct stat sb; /* Remember .st_size, etc. */
static jmp_buf jmpenv; /* setjmp/longjmp per-file error escape */
static const char *altmcount; /* alternate mcount symbol name */
/* setjmp() return values */
enum {
......@@ -299,7 +300,9 @@ do_file(char const *const fname)
fail_file();
} break;
case EM_386: reltype = R_386_32; break;
case EM_ARM: reltype = R_ARM_ABS32; break;
case EM_ARM: reltype = R_ARM_ABS32;
altmcount = "__gnu_mcount_nc";
break;
case EM_IA_64: reltype = R_IA64_IMM64; gpfx = '_'; break;
case EM_MIPS: /* reltype: e_class */ gpfx = '_'; break;
case EM_PPC: reltype = R_PPC_ADDR32; gpfx = '_'; break;
......
......@@ -275,11 +275,12 @@ static uint_t *sift_rel_mcount(uint_t *mlocp,
Elf_Sym const *const symp =
&sym0[Elf_r_sym(relp)];
char const *symname = &str0[w(symp->st_name)];
char const *mcount = '_' == gpfx ? "_mcount" : "mcount";
if ('.' == symname[0])
++symname; /* ppc64 hack */
if (0 == strcmp((('_' == gpfx) ? "_mcount" : "mcount"),
symname))
if (0 == strcmp(mcount, symname) ||
(altmcount && 0 == strcmp(altmcount, symname)))
mcountsym = Elf_r_sym(relp);
}
......
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