提交 ed153b07 编写于 作者: A Andy Shevchenko

pinctrl: intel: Define maximum pad number in the group

Instead of using hard coded magic number here and there,
define maximum pad number in the group in newly added
INTEL_PINCTRL_MAX_GPP_SIZE.
Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com>
上级 203a1c3e
...@@ -1406,7 +1406,7 @@ static int intel_pinctrl_add_padgroups_by_gpps(struct intel_pinctrl *pctrl, ...@@ -1406,7 +1406,7 @@ static int intel_pinctrl_add_padgroups_by_gpps(struct intel_pinctrl *pctrl,
for (i = 0; i < ngpps; i++) { for (i = 0; i < ngpps; i++) {
gpps[i] = community->gpps[i]; gpps[i] = community->gpps[i];
if (gpps[i].size > 32) if (gpps[i].size > INTEL_PINCTRL_MAX_GPP_SIZE)
return -EINVAL; return -EINVAL;
/* Special treatment for GPIO base */ /* Special treatment for GPIO base */
...@@ -1424,7 +1424,7 @@ static int intel_pinctrl_add_padgroups_by_gpps(struct intel_pinctrl *pctrl, ...@@ -1424,7 +1424,7 @@ static int intel_pinctrl_add_padgroups_by_gpps(struct intel_pinctrl *pctrl,
} }
gpps[i].padown_num = padown_num; gpps[i].padown_num = padown_num;
padown_num += DIV_ROUND_UP(gpps[i].size * 4, 32); padown_num += DIV_ROUND_UP(gpps[i].size * 4, INTEL_PINCTRL_MAX_GPP_SIZE);
} }
community->gpps = gpps; community->gpps = gpps;
...@@ -1440,7 +1440,7 @@ static int intel_pinctrl_add_padgroups_by_size(struct intel_pinctrl *pctrl, ...@@ -1440,7 +1440,7 @@ static int intel_pinctrl_add_padgroups_by_size(struct intel_pinctrl *pctrl,
unsigned int padown_num = 0; unsigned int padown_num = 0;
size_t i, ngpps = DIV_ROUND_UP(npins, community->gpp_size); size_t i, ngpps = DIV_ROUND_UP(npins, community->gpp_size);
if (community->gpp_size > 32) if (community->gpp_size > INTEL_PINCTRL_MAX_GPP_SIZE)
return -EINVAL; return -EINVAL;
gpps = devm_kcalloc(pctrl->dev, ngpps, sizeof(*gpps), GFP_KERNEL); gpps = devm_kcalloc(pctrl->dev, ngpps, sizeof(*gpps), GFP_KERNEL);
......
...@@ -46,11 +46,13 @@ struct intel_function { ...@@ -46,11 +46,13 @@ struct intel_function {
size_t ngroups; size_t ngroups;
}; };
#define INTEL_PINCTRL_MAX_GPP_SIZE 32
/** /**
* struct intel_padgroup - Hardware pad group information * struct intel_padgroup - Hardware pad group information
* @reg_num: GPI_IS register number * @reg_num: GPI_IS register number
* @base: Starting pin of this group * @base: Starting pin of this group
* @size: Size of this group (maximum is 32). * @size: Size of this group (maximum is %INTEL_PINCTRL_MAX_GPP_SIZE).
* @gpio_base: Starting GPIO base of this group * @gpio_base: Starting GPIO base of this group
* @padown_num: PAD_OWN register number (assigned by the core driver) * @padown_num: PAD_OWN register number (assigned by the core driver)
* *
......
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