提交 ec405e6b 编写于 作者: H He Sheng 提交者: Zheng Zengkai

sw64: fix the number of aux entries in ARCH_DLINFO

Sunway inclusion
category: bugfix
bugzilla: https://gitee.com/openeuler/kernel/issues/I56UNZ

--------------------------------

There's only AT_SYSINFO_EHDR auxiliary vector so far in SW64 ELF.
It's used to store vdso base of current task.
Signed-off-by: NHe Sheng <hesheng@wxiat.com>
Signed-off-by: NGu Zitao <guzitao@wxiat.com>
Acked-by: NXie XiuQi <xiexiuqi@huawei.com>
Signed-off-by: NZheng Zengkai <zhengzengkai@huawei.com>
上级 f9317fee
...@@ -2,25 +2,10 @@ ...@@ -2,25 +2,10 @@
#ifndef _UAPI_ASM_SW64_AUXVEC_H #ifndef _UAPI_ASM_SW64_AUXVEC_H
#define _UAPI_ASM_SW64_AUXVEC_H #define _UAPI_ASM_SW64_AUXVEC_H
/* Reserve these numbers for any future use of a VDSO. */ /* VDSO location. */
#define AT_SYSINFO 32
#define AT_SYSINFO_EHDR 33 #define AT_SYSINFO_EHDR 33
/* /* entries in ARCH_DLINFO */
* More complete cache descriptions than AT_[DIU]CACHEBSIZE. If the #define AT_VECTOR_SIZE_ARCH 1
* value is -1, then the cache doesn't exist. Otherwise:
*
* bit 0-3: Cache set-associativity; 0 means fully associative.
* bit 4-7: Log2 of cacheline size.
* bit 8-31: Size of the entire cache >> 8.
* bit 32-63: Reserved.
*/
#define AT_L1I_CACHESHAPE 34
#define AT_L1D_CACHESHAPE 35
#define AT_L2_CACHESHAPE 36
#define AT_L3_CACHESHAPE 37
#define AT_VECTOR_SIZE_ARCH 4 /* entries in ARCH_DLINFO */
#endif /* _UAPI_ASM_SW64_AUXVEC_H */ #endif /* _UAPI_ASM_SW64_AUXVEC_H */
Markdown is supported
0% .
You are about to add 0 people to the discussion. Proceed with caution.
先完成此消息的编辑!
想要评论请 注册