PCI: Check if the pci controller can use both CFG0 and CFG1 mode to access configuration space

LoongArch inclusion
category: feature
bugzilla: https://gitee.com/openeuler/kernel/issues/I6BWFP

--------------------------------

Fix patch "PCI: loongson: Use generic 8/16/32-bit
config ops on LS2K/LS7A"
Signed-off-by: NTianli Xiong <xiongtianli@loongson.cn>
Change-Id: I59f2de29370d5d9085254d8c4337f4bbcae99de0
(cherry picked from commit d4a1d525)

drivers/pci/controller/pci-loongson.c

@@ -282,6 +282,7 @@ static int loongson_pci_probe(struct platform_device *pdev)
 	struct device_node *node = dev->of_node;
 	struct pci_host_bridge *bridge;
 	struct resource *regs;
+	unsigned int num = 0;
 
 	if (!node)
 		return -ENODEV;
@@ -306,7 +307,9 @@ static int loongson_pci_probe(struct platform_device *pdev)
 	}
 
 	if (priv->data->flags & FLAG_CFG1) {
-		regs = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+		if (priv->cfg0_base)
+			num = 1;
+		regs = platform_get_resource(pdev, IORESOURCE_MEM, num);
 		if (!regs)
 			dev_info(dev, "missing mem resource for cfg1\n");
 		else {