drm/nouveau/bar/nv50,g84: drop mmu invalidate

Will already be done by MMU as a result of the PT writes that occur
during BAR2 bootstrapping.

This is likely just a left-over from the days when it was hardcoded.
Signed-off-by: NBen Skeggs <bskeggs@redhat.com>

drivers/gpu/drm/nouveau/nvkm/subdev/bar/base.c

@@ -56,7 +56,8 @@ static int
 nvkm_bar_init(struct nvkm_subdev *subdev)
 {
 	struct nvkm_bar *bar = nvkm_bar(subdev);
-	return bar->func->init(bar);
+	bar->func->init(bar);
+	return 0;
 }
 
 static void *

drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.c

@@ -117,7 +117,7 @@ gf100_bar_oneinit(struct nvkm_bar *base)
 	return 0;
 }
 
-int
+void
 gf100_bar_init(struct nvkm_bar *base)
 {
 	struct gf100_bar *bar = gf100_bar(base);
@@ -136,8 +136,6 @@ gf100_bar_init(struct nvkm_bar *base)
 			addr |= 0x40000000;
 		nvkm_wr32(device, 0x001714, 0x80000000 | addr);
 	}
-
-	return 0;
 }
 
 void *

drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.h

@@ -19,6 +19,6 @@ int gf100_bar_new_(const struct nvkm_bar_func *, struct nvkm_device *,
 		   int, struct nvkm_bar **);
 void *gf100_bar_dtor(struct nvkm_bar *);
 int gf100_bar_oneinit(struct nvkm_bar *);
-int gf100_bar_init(struct nvkm_bar *);
+void gf100_bar_init(struct nvkm_bar *);
 int gf100_bar_umap(struct nvkm_bar *, u64, int, struct nvkm_vma *);
 #endif

drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c

@@ -144,7 +144,7 @@ nv50_bar_oneinit(struct nvkm_bar *base)
 	return 0;
 }
 
-int
+void
 nv50_bar_init(struct nvkm_bar *base)
 {
 	struct nv50_bar *bar = nv50_bar(base);
@@ -153,12 +153,6 @@ nv50_bar_init(struct nvkm_bar *base)
 
 	nvkm_mask(device, 0x000200, 0x00000100, 0x00000000);
 	nvkm_mask(device, 0x000200, 0x00000100, 0x00000100);
-	nvkm_wr32(device, 0x100c80, 0x00060001);
-	if (nvkm_msec(device, 2000,
-		if (!(nvkm_rd32(device, 0x100c80) & 0x00000001))
-			break;
-	) < 0)
-		return -EBUSY;
 
 	nvkm_wr32(device, 0x001704, 0x00000000 | bar->mem->addr >> 12);
 	nvkm_wr32(device, 0x001704, 0x40000000 | bar->mem->addr >> 12);
@@ -166,7 +160,6 @@ nv50_bar_init(struct nvkm_bar *base)
 	nvkm_wr32(device, 0x00170c, 0x80000000 | bar->bar3->node->offset >> 4);
 	for (i = 0; i < 8; i++)
 		nvkm_wr32(device, 0x001900 + (i * 4), 0x00000000);
-	return 0;
 }
 
 void *

drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.h

@@ -19,7 +19,7 @@ int nv50_bar_new_(const struct nvkm_bar_func *, struct nvkm_device *,
 		  int, u32 pgd_addr, struct nvkm_bar **);
 void *nv50_bar_dtor(struct nvkm_bar *);
 int nv50_bar_oneinit(struct nvkm_bar *);
-int nv50_bar_init(struct nvkm_bar *);
+void nv50_bar_init(struct nvkm_bar *);
 struct nvkm_vm *nv50_bar_kmap(struct nvkm_bar *);
 int nv50_bar_umap(struct nvkm_bar *, u64, int, struct nvkm_vma *);
 void nv50_bar_unmap(struct nvkm_bar *, struct nvkm_vma *);

drivers/gpu/drm/nouveau/nvkm/subdev/bar/priv.h

@@ -9,7 +9,7 @@ void nvkm_bar_ctor(const struct nvkm_bar_func *, struct nvkm_device *,
 struct nvkm_bar_func {
 	void *(*dtor)(struct nvkm_bar *);
 	int (*oneinit)(struct nvkm_bar *);
-	int (*init)(struct nvkm_bar *);
+	void (*init)(struct nvkm_bar *);
 	struct nvkm_vm *(*kmap)(struct nvkm_bar *);
 	int  (*umap)(struct nvkm_bar *, u64 size, int type, struct nvkm_vma *);
 	void (*flush)(struct nvkm_bar *);