arm64: dts: uniphier: add Denali NAND controller nodes

Add NAND controller node to LD11 and LD20.  Neither of them supports
the CS1 line, so pinctrl is set up for a single CS line.
Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com>

arch/arm64/boot/dts/socionext/uniphier-ld11-global.dts

@@ -68,3 +68,7 @@
 &usb2 {
 	status = "okay";
 };
+
+&nand {
+	status = "okay";
+};

arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi

@@ -372,6 +372,17 @@
 				compatible = "socionext,uniphier-wdt";
 			};
 		};
+
+		nand: nand@68000000 {
+			compatible = "socionext,uniphier-denali-nand-v5b";
+			status = "disabled";
+			reg-names = "nand_data", "denali_reg";
+			reg = <0x68000000 0x20>, <0x68100000 0x1000>;
+			interrupts = <0 65 4>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_nand>;
+			clocks = <&sys_clk 2>;
+		};
 	};
 };
 

arch/arm64/boot/dts/socionext/uniphier-ld20-global.dts

@@ -50,3 +50,7 @@
 &i2c0 {
 	status = "okay";
 };
+
+&nand {
+	status = "okay";
+};

arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi

@@ -393,6 +393,17 @@
 				compatible = "socionext,uniphier-wdt";
 			};
 		};
+
+		nand: nand@68000000 {
+			compatible = "socionext,uniphier-denali-nand-v5b";
+			status = "disabled";
+			reg-names = "nand_data", "denali_reg";
+			reg = <0x68000000 0x20>, <0x68100000 0x1000>;
+			interrupts = <0 65 4>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_nand>;
+			clocks = <&sys_clk 2>;
+		};
 	};
 };