提交 e5a4ad0d 编写于 作者: N Nick Kossifidis 提交者: John W. Linville

ath5k: Misc hw_attach fixes

 * Correctly attach RF2425
 * Update SREV values for Radio chips
 * Update hw_attach to use new SPENDING values
 * Write a bit after POST for some chips

Changes-licensed-under: ISC
Signed-off-by: NNick Kossifidis <mickflemm@gmail.com>
Signed-off-by: NJohn W. Linville <linville@tuxdriver.com>
上级 ba37746e
...@@ -186,11 +186,13 @@ struct ath5k_srev_name { ...@@ -186,11 +186,13 @@ struct ath5k_srev_name {
#define AR5K_SREV_RAD_2111 0x20 #define AR5K_SREV_RAD_2111 0x20
#define AR5K_SREV_RAD_5112 0x30 #define AR5K_SREV_RAD_5112 0x30
#define AR5K_SREV_RAD_5112A 0x35 #define AR5K_SREV_RAD_5112A 0x35
#define AR5K_SREV_RAD_5112B 0x36
#define AR5K_SREV_RAD_2112 0x40 #define AR5K_SREV_RAD_2112 0x40
#define AR5K_SREV_RAD_2112A 0x45 #define AR5K_SREV_RAD_2112A 0x45
#define AR5K_SREV_RAD_SC0 0x56 /* Found on 2413/2414 */ #define AR5K_SREV_RAD_2112B 0x46
#define AR5K_SREV_RAD_SC1 0x63 /* Found on 5413/5414 */ #define AR5K_SREV_RAD_SC0 0x50 /* Found on 2413/2414 */
#define AR5K_SREV_RAD_SC2 0xa2 /* Found on 2424-5/5424 */ #define AR5K_SREV_RAD_SC1 0x60 /* Found on 5413/5414 */
#define AR5K_SREV_RAD_SC2 0xa0 /* Found on 2424-5/5424 */
#define AR5K_SREV_RAD_5133 0xc0 /* MIMO found on 5418 */ #define AR5K_SREV_RAD_5133 0xc0 /* MIMO found on 5418 */
/* IEEE defs */ /* IEEE defs */
......
...@@ -293,67 +293,42 @@ struct ath5k_hw *ath5k_hw_attach(struct ath5k_softc *sc, u8 mac_version) ...@@ -293,67 +293,42 @@ struct ath5k_hw *ath5k_hw_attach(struct ath5k_softc *sc, u8 mac_version)
/* Identify the radio chip*/ /* Identify the radio chip*/
if (ah->ah_version == AR5K_AR5210) { if (ah->ah_version == AR5K_AR5210) {
ah->ah_radio = AR5K_RF5110; ah->ah_radio = AR5K_RF5110;
/*
* Register returns 0x0/0x04 for radio revision
* so ath5k_hw_radio_revision doesn't parse the value
* correctly. For now we are based on mac's srev to
* identify RF2425 radio.
*/
} else if (srev == AR5K_SREV_VER_AR2425) {
ah->ah_radio = AR5K_RF2425;
ah->ah_phy_spending = AR5K_PHY_SPENDING_RF2425;
} else if (ah->ah_radio_5ghz_revision < AR5K_SREV_RAD_5112) { } else if (ah->ah_radio_5ghz_revision < AR5K_SREV_RAD_5112) {
ah->ah_radio = AR5K_RF5111; ah->ah_radio = AR5K_RF5111;
ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5111; ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5111;
} else if (ah->ah_radio_5ghz_revision < AR5K_SREV_RAD_SC0) { } else if (ah->ah_radio_5ghz_revision < AR5K_SREV_RAD_SC0) {
ah->ah_radio = AR5K_RF5112; ah->ah_radio = AR5K_RF5112;
ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5112;
if (ah->ah_radio_5ghz_revision < AR5K_SREV_RAD_5112A) {
ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5112;
} else {
ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5112A;
}
} else if (ah->ah_radio_5ghz_revision < AR5K_SREV_RAD_SC1) { } else if (ah->ah_radio_5ghz_revision < AR5K_SREV_RAD_SC1) {
ah->ah_radio = AR5K_RF2413; ah->ah_radio = AR5K_RF2413;
ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5112A; ah->ah_phy_spending = AR5K_PHY_SPENDING_RF2413;
} else if (ah->ah_radio_5ghz_revision < AR5K_SREV_RAD_SC2) { } else if (ah->ah_radio_5ghz_revision < AR5K_SREV_RAD_SC2) {
ah->ah_radio = AR5K_RF5413; ah->ah_radio = AR5K_RF5413;
ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5112A; ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5413;
} else if (ah->ah_radio_5ghz_revision < AR5K_SREV_RAD_5133) { } else if (ah->ah_radio_5ghz_revision < AR5K_SREV_RAD_5133) {
/* AR5424 */ /* AR5424 */
if (srev >= AR5K_SREV_VER_AR5424) { if (srev >= AR5K_SREV_VER_AR5424) {
ah->ah_radio = AR5K_RF5413; ah->ah_radio = AR5K_RF5413;
ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5424; ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5413;
/* AR2424 */ /* AR2424 */
} else { } else {
ah->ah_radio = AR5K_RF2413; /* For testing */ ah->ah_radio = AR5K_RF2413; /* For testing */
ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5112A; ah->ah_phy_spending = AR5K_PHY_SPENDING_RF2413;
} }
/*
* Register returns 0x4 for radio revision
* so ath5k_hw_radio_revision doesn't parse the value
* correctly. For now we are based on mac's srev to
* identify RF2425 radio.
*/
} else if (srev == AR5K_SREV_VER_AR2425) {
ah->ah_radio = AR5K_RF2425;
ah->ah_phy_spending = AR5K_PHY_SPENDING_RF5112;
} }
ah->ah_phy = AR5K_PHY(0); ah->ah_phy = AR5K_PHY(0);
/* /*
* Identify AR5212-based PCI-E cards * Write PCI-E power save settings
* And write some initial settings.
*
* (doing a "strings" on ndis driver
* -ar5211.sys- reveals the following
* pci-e related functions:
*
* pcieClockReq
* pcieRxErrNotify
* pcieL1SKPEnable
* pcieAspm
* pcieDisableAspmOnRfWake
* pciePowerSaveEnable
*
* I guess these point to ClockReq but
* i'm not sure.)
*/ */
if ((ah->ah_version == AR5K_AR5212) && (pdev->is_pcie)) { if ((ah->ah_version == AR5K_AR5212) && (pdev->is_pcie)) {
ath5k_hw_reg_write(ah, 0x9248fc00, 0x4080); ath5k_hw_reg_write(ah, 0x9248fc00, 0x4080);
...@@ -375,10 +350,15 @@ struct ath5k_hw *ath5k_hw_attach(struct ath5k_softc *sc, u8 mac_version) ...@@ -375,10 +350,15 @@ struct ath5k_hw *ath5k_hw_attach(struct ath5k_softc *sc, u8 mac_version)
if (ret) if (ret)
goto err_free; goto err_free;
/* Write AR5K_PCICFG_UNK on 2112B and later chips */
if (ah->ah_radio_5ghz_revision > AR5K_SREV_RAD_2112B ||
srev > AR5K_SREV_VER_AR2413) {
ath5k_hw_reg_write(ah, AR5K_PCICFG_UNK, AR5K_PCICFG);
}
/* /*
* Get card capabilities, values, ... * Get card capabilities, values, ...
*/ */
ret = ath5k_eeprom_init(ah); ret = ath5k_eeprom_init(ah);
if (ret) { if (ret) {
ATH5K_ERR(sc, "unable to init EEPROM\n"); ATH5K_ERR(sc, "unable to init EEPROM\n");
......
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