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提交 e4fcaeff 编写于 作者: F Florian Tobias Schandinat
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viafb: split pll configs up 

This patch splits the pll configs up on pll versions. This allows
easy adding of other known good pll values. Additionally it made it
possible to remove invalid configurations resulting in better
behaviour for such cases. The resulting clocks are no longer stored
resulting in some computing overhead on each mode change.
Signed-off-by: NFlorian Tobias Schandinat <FlorianSchandinat@gmx.de>
上级 fd3cc698
隐藏空白更改
内联 并排
Showing with 301 addition and 347 deletion
drivers/video/via/hw.c
浏览文件 @ e4fcaeff
...@@ -22,342 +22,272 @@ ...@@ -22,342 +22,272 @@
#include <linux/via-core.h> #include <linux/via-core.h>
#include "global.h" #include "global.h"
static struct pll_map pll_value[] = { static struct pll_config cle266_pll_config[] = {
{25175000, {19, 4, 0},
{99, 7, 3}, {26, 5, 0},
{85, 3, 4}, /* ignoring bit difference: 0x00008000 */ {28, 5, 0},
{141, 5, 4}, {31, 5, 0},
{141, 5, 4} }, {33, 5, 0},
{29581000, {55, 5, 0},
{33, 4, 2}, {102, 5, 0},
{66, 2, 4}, /* ignoring bit difference: 0x00808000 */ {53, 6, 0},
{166, 5, 4}, /* ignoring bit difference: 0x00008000 */ {92, 6, 0},
{165, 5, 4} }, {98, 6, 0},
{26880000, {112, 6, 0},
{15, 4, 1}, {41, 7, 0},
{30, 2, 3}, /* ignoring bit difference: 0x00808000 */ {60, 7, 0},
{150, 5, 4}, {99, 7, 0},
{150, 5, 4} }, {100, 7, 0},
{31500000, {83, 8, 0},
{53, 3, 3}, /* ignoring bit difference: 0x00008000 */ {86, 8, 0},
{141, 4, 4}, /* ignoring bit difference: 0x00008000 */ {108, 8, 0},
{176, 5, 4}, {87, 9, 0},
{176, 5, 4} }, {118, 9, 0},
{31728000, {95, 12, 0},
{31, 7, 1}, {115, 12, 0},
{177, 5, 4}, /* ignoring bit difference: 0x00008000 */ {108, 13, 0},
{177, 5, 4}, {83, 17, 0},
{142, 4, 4} }, {67, 20, 0},
{32688000, {86, 20, 0},
{73, 4, 3}, {98, 20, 0},
{146, 4, 4}, /* ignoring bit difference: 0x00008000 */ {121, 24, 0},
{183, 5, 4}, {99, 29, 0},
{146, 4, 4} }, {33, 3, 1},
{36000000, {15, 4, 1},
{101, 5, 3}, /* ignoring bit difference: 0x00008000 */ {23, 4, 1},
{161, 4, 4}, /* ignoring bit difference: 0x00008000 */ {37, 5, 1},
{202, 5, 4}, {83, 5, 1},
{161, 4, 4} }, {85, 5, 1},
{40000000, {94, 5, 1},
{89, 4, 3}, {103, 5, 1},
{89, 4, 3}, /* ignoring bit difference: 0x00008000 */ {109, 5, 1},
{112, 5, 3}, {113, 5, 1},
{112, 5, 3} }, {121, 5, 1},
{41291000, {82, 6, 1},
{23, 4, 1}, {31, 7, 1},
{69, 3, 3}, /* ignoring bit difference: 0x00008000 */ {55, 7, 1},
{115, 5, 3}, {84, 7, 1},
{115, 5, 3} }, {83, 8, 1},
{43163000, {76, 9, 1},
{121, 5, 3}, {127, 9, 1},
{121, 5, 3}, /* ignoring bit difference: 0x00008000 */ {33, 4, 2},
{121, 5, 3}, {75, 4, 2},
{121, 5, 3} }, {119, 4, 2},
{45250000, {121, 4, 2},
{127, 5, 3}, {91, 5, 2},
{127, 5, 3}, /* ignoring bit difference: 0x00808000 */ {118, 5, 2},
{127, 5, 3}, {83, 6, 2},
{127, 5, 3} }, {109, 6, 2},
{46000000, {90, 7, 2},
{90, 7, 2}, {93, 2, 3},
{103, 4, 3}, /* ignoring bit difference: 0x00008000 */ {53, 3, 3},
{129, 5, 3}, {73, 4, 3},
{103, 4, 3} }, {89, 4, 3},
{46996000, {105, 4, 3},
{105, 4, 3}, /* ignoring bit difference: 0x00008000 */ {117, 4, 3},
{131, 5, 3}, /* ignoring bit difference: 0x00808000 */ {101, 5, 3},
{131, 5, 3}, /* ignoring bit difference: 0x00808000 */ {121, 5, 3},
{105, 4, 3} }, {127, 5, 3},
{48000000, {99, 7, 3}
{67, 20, 0}, };
{134, 5, 3}, /* ignoring bit difference: 0x00808000 */
{134, 5, 3}, static struct pll_config k800_pll_config[] = {
{134, 5, 3} }, {22, 2, 0},
{48875000, {28, 3, 0},
{99, 29, 0}, {81, 3, 1},
{82, 3, 3}, /* ignoring bit difference: 0x00808000 */ {85, 3, 1},
{82, 3, 3}, /* ignoring bit difference: 0x00808000 */ {98, 3, 1},
{137, 5, 3} }, {112, 3, 1},
{49500000, {86, 4, 1},
{83, 6, 2}, {166, 4, 1},
{83, 3, 3}, /* ignoring bit difference: 0x00008000 */ {109, 5, 1},
{138, 5, 3}, {113, 5, 1},
{83, 3, 3} }, {121, 5, 1},
{52406000, {131, 5, 1},
{117, 4, 3}, {143, 5, 1},
{117, 4, 3}, /* ignoring bit difference: 0x00008000 */ {153, 5, 1},
{117, 4, 3}, {66, 3, 2},
{88, 3, 3} }, {68, 3, 2},
{52977000, {95, 3, 2},
{37, 5, 1}, {106, 3, 2},
{148, 5, 3}, /* ignoring bit difference: 0x00808000 */ {116, 3, 2},
{148, 5, 3}, {93, 4, 2},
{148, 5, 3} }, {119, 4, 2},
{56250000, {121, 4, 2},
{55, 7, 1}, /* ignoring bit difference: 0x00008000 */ {133, 4, 2},
{126, 4, 3}, /* ignoring bit difference: 0x00008000 */ {137, 4, 2},
{157, 5, 3}, {117, 5, 2},
{157, 5, 3} }, {118, 5, 2},
{57275000, {120, 5, 2},
{0, 0, 0}, {124, 5, 2},
{2, 2, 0}, {132, 5, 2},
{2, 2, 0}, {137, 5, 2},
{157, 5, 3} }, /* ignoring bit difference: 0x00808000 */ {141, 5, 2},
{60466000, {166, 5, 2},
{76, 9, 1}, {170, 5, 2},
{169, 5, 3}, /* ignoring bit difference: 0x00808000 */ {191, 5, 2},
{169, 5, 3}, /* FIXED: old = {72, 2, 3} */ {206, 5, 2},
{169, 5, 3} }, {208, 5, 2},
{61500000, {30, 2, 3},
{86, 20, 0}, {69, 3, 3},
{172, 5, 3}, /* ignoring bit difference: 0x00808000 */ {82, 3, 3},
{172, 5, 3}, {83, 3, 3},
{172, 5, 3} }, {109, 3, 3},
{65000000, {114, 3, 3},
{109, 6, 2}, /* ignoring bit difference: 0x00008000 */ {125, 3, 3},
{109, 3, 3}, /* ignoring bit difference: 0x00008000 */ {89, 4, 3},
{109, 3, 3}, {103, 4, 3},
{109, 3, 3} }, {117, 4, 3},
{65178000, {126, 4, 3},
{91, 5, 2}, {150, 4, 3},
{182, 5, 3}, /* ignoring bit difference: 0x00808000 */ {161, 4, 3},
{109, 3, 3}, {121, 5, 3},
{182, 5, 3} }, {127, 5, 3},
{66750000, {131, 5, 3},
{75, 4, 2}, {134, 5, 3},
{150, 4, 3}, /* ignoring bit difference: 0x00808000 */ {148, 5, 3},
{150, 4, 3}, {169, 5, 3},
{112, 3, 3} }, {172, 5, 3},
{68179000, {182, 5, 3},
{19, 4, 0}, {195, 5, 3},
{114, 3, 3}, /* ignoring bit difference: 0x00008000 */ {196, 5, 3},
{190, 5, 3}, {208, 5, 3},
{191, 5, 3} }, {66, 2, 4},
{69924000, {85, 3, 4},
{83, 17, 0}, {141, 4, 4},
{195, 5, 3}, /* ignoring bit difference: 0x00808000 */ {146, 4, 4},
{195, 5, 3}, {161, 4, 4},
{195, 5, 3} }, {177, 5, 4}
{70159000, };
{98, 20, 0},
{196, 5, 3}, /* ignoring bit difference: 0x00808000 */ static struct pll_config cx700_pll_config[] = {
{196, 5, 3}, {98, 3, 1},
{195, 5, 3} }, {86, 4, 1},
{72000000, {109, 5, 1},
{121, 24, 0}, {110, 5, 1},
{161, 4, 3}, /* ignoring bit difference: 0x00808000 */ {113, 5, 1},
{161, 4, 3}, {121, 5, 1},
{161, 4, 3} }, {131, 5, 1},
{78750000, {135, 5, 1},
{33, 3, 1}, {142, 5, 1},
{66, 3, 2}, /* ignoring bit difference: 0x00008000 */ {143, 5, 1},
{110, 5, 2}, {153, 5, 1},
{110, 5, 2} }, {187, 5, 1},
{80136000, {208, 5, 1},
{28, 5, 0}, {68, 2, 2},
{68, 3, 2}, /* ignoring bit difference: 0x00008000 */ {95, 3, 2},
{112, 5, 2}, {116, 3, 2},
{112, 5, 2} }, {93, 4, 2},
{83375000, {119, 4, 2},
{93, 2, 3}, {133, 4, 2},
{93, 4, 2}, /* ignoring bit difference: 0x00800000 */ {137, 4, 2},
{93, 4, 2}, /* ignoring bit difference: 0x00800000 */ {151, 4, 2},
{117, 5, 2} }, {166, 4, 2},
{83950000, {110, 5, 2},
{41, 7, 0}, {112, 5, 2},
{117, 5, 2}, /* ignoring bit difference: 0x00008000 */ {117, 5, 2},
{117, 5, 2}, {118, 5, 2},
{117, 5, 2} }, {120, 5, 2},
{84750000, {132, 5, 2},
{118, 5, 2}, {137, 5, 2},
{118, 5, 2}, /* ignoring bit difference: 0x00808000 */ {141, 5, 2},
{118, 5, 2}, {151, 5, 2},
{118, 5, 2} }, {166, 5, 2},
{85860000, {175, 5, 2},
{84, 7, 1}, {191, 5, 2},
{120, 5, 2}, /* ignoring bit difference: 0x00808000 */ {206, 5, 2},
{120, 5, 2}, {174, 7, 2},
{118, 5, 2} }, {82, 3, 3},
{88750000, {109, 3, 3},
{31, 5, 0}, {117, 4, 3},
{124, 5, 2}, /* ignoring bit difference: 0x00808000 */ {150, 4, 3},
{174, 7, 2}, /* ignoring bit difference: 0x00808000 */ {161, 4, 3},
{124, 5, 2} }, {112, 5, 3},
{94500000, {115, 5, 3},
{33, 5, 0}, {121, 5, 3},
{132, 5, 2}, /* ignoring bit difference: 0x00008000 */ {127, 5, 3},
{132, 5, 2}, {129, 5, 3},
{132, 5, 2} }, {131, 5, 3},
{97750000, {134, 5, 3},
{82, 6, 1}, {138, 5, 3},
{137, 5, 2}, /* ignoring bit difference: 0x00808000 */ {148, 5, 3},
{137, 5, 2}, {157, 5, 3},
{137, 5, 2} }, {169, 5, 3},
{101000000, {172, 5, 3},
{127, 9, 1}, {190, 5, 3},
{141, 5, 2}, /* ignoring bit difference: 0x00808000 */ {195, 5, 3},
{141, 5, 2}, {196, 5, 3},
{141, 5, 2} }, {208, 5, 3},
{106500000, {141, 5, 4},
{119, 4, 2}, {150, 5, 4},
{119, 4, 2}, /* ignoring bit difference: 0x00808000 */ {166, 5, 4},
{119, 4, 2}, {176, 5, 4},
{149, 5, 2} }, {177, 5, 4},
{108000000, {183, 5, 4},
{121, 4, 2}, {202, 5, 4}
{121, 4, 2}, /* ignoring bit difference: 0x00808000 */ };
{151, 5, 2},
{151, 5, 2} }, static struct pll_config vx855_pll_config[] = {
{113309000, {86, 4, 1},
{95, 12, 0}, {108, 5, 1},
{95, 3, 2}, /* ignoring bit difference: 0x00808000 */ {110, 5, 1},
{95, 3, 2}, {113, 5, 1},
{159, 5, 2} }, {121, 5, 1},
{118840000, {131, 5, 1},
{83, 5, 1}, {135, 5, 1},
{166, 5, 2}, /* ignoring bit difference: 0x00808000 */ {142, 5, 1},
{166, 5, 2}, {143, 5, 1},
{166, 5, 2} }, {153, 5, 1},
{119000000, {164, 5, 1},
{108, 13, 0}, {187, 5, 1},
{133, 4, 2}, /* ignoring bit difference: 0x00808000 */ {208, 5, 1},
{133, 4, 2}, {110, 5, 2},
{167, 5, 2} }, {112, 5, 2},
{121750000, {117, 5, 2},
{85, 5, 1}, {118, 5, 2},
{170, 5, 2}, /* ignoring bit difference: 0x00808000 */ {124, 5, 2},
{68, 2, 2}, {132, 5, 2},
{0, 0, 0} }, {137, 5, 2},
{125104000, {141, 5, 2},
{53, 6, 0}, /* ignoring bit difference: 0x00008000 */ {149, 5, 2},
{106, 3, 2}, /* ignoring bit difference: 0x00008000 */ {151, 5, 2},
{175, 5, 2}, {159, 5, 2},
{0, 0, 0} }, {166, 5, 2},
{135000000, {167, 5, 2},
{94, 5, 1}, {172, 5, 2},
{28, 3, 0}, /* ignoring bit difference: 0x00804000 */ {189, 5, 2},
{151, 4, 2}, {191, 5, 2},
{189, 5, 2} }, {194, 5, 2},
{136700000, {206, 5, 2},
{115, 12, 0}, {208, 5, 2},
{191, 5, 2}, /* ignoring bit difference: 0x00808000 */ {83, 3, 3},
{191, 5, 2}, {88, 3, 3},
{191, 5, 2} }, {109, 3, 3},
{138400000, {112, 3, 3},
{87, 9, 0}, {103, 4, 3},
{116, 3, 2}, /* ignoring bit difference: 0x00808000 */ {105, 4, 3},
{116, 3, 2}, {161, 4, 3},
{194, 5, 2} }, {112, 5, 3},
{146760000, {115, 5, 3},
{103, 5, 1}, {121, 5, 3},
{206, 5, 2}, /* ignoring bit difference: 0x00808000 */ {127, 5, 3},
{206, 5, 2}, {134, 5, 3},
{206, 5, 2} }, {137, 5, 3},
{153920000, {148, 5, 3},
{86, 8, 0}, {157, 5, 3},
{86, 4, 1}, /* ignoring bit difference: 0x00808000 */ {169, 5, 3},
{86, 4, 1}, {172, 5, 3},
{86, 4, 1} }, /* FIXED: old = {84, 2, 1} */ {182, 5, 3},
{156000000, {191, 5, 3},
{109, 5, 1}, {195, 5, 3},
{109, 5, 1}, /* ignoring bit difference: 0x00808000 */ {209, 5, 3},
{109, 5, 1}, {142, 4, 4},
{108, 5, 1} }, {146, 4, 4},
{157500000, {161, 4, 4},
{55, 5, 0}, /* ignoring bit difference: 0x00008000 */ {141, 5, 4},
{22, 2, 0}, /* ignoring bit difference: 0x00802000 */ {150, 5, 4},
{110, 5, 1}, {165, 5, 4},
{110, 5, 1} }, {176, 5, 4}
{162000000,
{113, 5, 1},
{113, 5, 1}, /* ignoring bit difference: 0x00808000 */
{113, 5, 1},
{113, 5, 1} },
{187000000,
{118, 9, 0},
{131, 5, 1}, /* ignoring bit difference: 0x00808000 */
{131, 5, 1},
{131, 5, 1} },
{193295000,
{108, 8, 0},
{81, 3, 1}, /* ignoring bit difference: 0x00808000 */
{135, 5, 1},
{135, 5, 1} },
{202500000,
{99, 7, 0},
{85, 3, 1}, /* ignoring bit difference: 0x00808000 */
{142, 5, 1},
{142, 5, 1} },
{204000000,
{100, 7, 0},
{143, 5, 1}, /* ignoring bit difference: 0x00808000 */
{143, 5, 1},
{143, 5, 1} },
{218500000,
{92, 6, 0},
{153, 5, 1}, /* ignoring bit difference: 0x00808000 */
{153, 5, 1},
{153, 5, 1} },
{234000000,
{98, 6, 0},
{98, 3, 1}, /* ignoring bit difference: 0x00008000 */
{98, 3, 1},
{164, 5, 1} },
{267250000,
{112, 6, 0},
{112, 3, 1}, /* ignoring bit difference: 0x00808000 */
{187, 5, 1},
{187, 5, 1} },
{297500000,
{102, 5, 0}, /* ignoring bit difference: 0x00008000 */
{166, 4, 1}, /* ignoring bit difference: 0x00008000 */
{208, 5, 1},
{208, 5, 1} },
{74481000,
{26, 5, 0},
{125, 3, 3}, /* ignoring bit difference: 0x00808000 */
{208, 5, 3},
{209, 5, 3} },
{172798000,
{121, 5, 1},
{121, 5, 1}, /* ignoring bit difference: 0x00808000 */
{121, 5, 1},
{121, 5, 1} },
{122614000,
{60, 7, 0},
{137, 4, 2}, /* ignoring bit difference: 0x00808000 */
{137, 4, 2},
{172, 5, 2} },
{74270000,
{83, 8, 1},
{208, 5, 3},
{208, 5, 3},
{0, 0, 0} },
{148500000,
{83, 8, 0},
{208, 5, 2},
{166, 4, 2},
{208, 5, 2} }
}; };
static struct fifo_depth_select display_fifo_depth_reg = { static struct fifo_depth_select display_fifo_depth_reg = {
...@@ -1674,26 +1604,48 @@ static u32 vx855_encode_pll(struct pll_config pll) ...@@ -1674,26 +1604,48 @@ static u32 vx855_encode_pll(struct pll_config pll)
| pll.multiplier; | pll.multiplier;
} }
u32 viafb_get_clk_value(int clk) static inline u32 get_pll_internal_frequency(u32 ref_freq,
struct pll_config pll)
{ {
u32 value = 0; return ref_freq / pll.divisor * pll.multiplier;
int i, best = 0; }
for (i = 1; i < ARRAY_SIZE(pll_value); i++) { static inline u32 get_pll_output_frequency(u32 ref_freq, struct pll_config pll)
if (abs(pll_value[i].clk - clk) {
< abs(pll_value[best].clk - clk)) return get_pll_internal_frequency(ref_freq, pll)>>pll.rshift;
best = i; }
static struct pll_config get_pll_config(struct pll_config *config, int size,
int clk)
{
struct pll_config best = config[0];
const u32 f0 = 14318180; /* X1 frequency */
int i;
for (i = 1; i < size; i++) {
if (abs(get_pll_output_frequency(f0, config[i]) - clk)
< abs(get_pll_output_frequency(f0, best) - clk))
best = config[i];
} }
return best;
}
u32 viafb_get_clk_value(int clk)
{
u32 value = 0;
switch (viaparinfo->chip_info->gfx_chip_name) { switch (viaparinfo->chip_info->gfx_chip_name) {
case UNICHROME_CLE266: case UNICHROME_CLE266:
case UNICHROME_K400: case UNICHROME_K400:
value = cle266_encode_pll(pll_value[best].cle266_pll); value = cle266_encode_pll(get_pll_config(cle266_pll_config,
ARRAY_SIZE(cle266_pll_config), clk));
break; break;
case UNICHROME_K800: case UNICHROME_K800:
case UNICHROME_PM800: case UNICHROME_PM800:
case UNICHROME_CN700: case UNICHROME_CN700:
value = k800_encode_pll(pll_value[best].k800_pll); value = k800_encode_pll(get_pll_config(k800_pll_config,
ARRAY_SIZE(k800_pll_config), clk));
break; break;
case UNICHROME_CX700: case UNICHROME_CX700:
case UNICHROME_CN750: case UNICHROME_CN750:
...@@ -1701,11 +1653,13 @@ u32 viafb_get_clk_value(int clk) ...@@ -1701,11 +1653,13 @@ u32 viafb_get_clk_value(int clk)
case UNICHROME_P4M890: case UNICHROME_P4M890:
case UNICHROME_P4M900: case UNICHROME_P4M900:
case UNICHROME_VX800: case UNICHROME_VX800:
value = k800_encode_pll(pll_value[best].cx700_pll); value = k800_encode_pll(get_pll_config(cx700_pll_config,
ARRAY_SIZE(cx700_pll_config), clk));
break; break;
case UNICHROME_VX855: case UNICHROME_VX855:
case UNICHROME_VX900: case UNICHROME_VX900:
value = vx855_encode_pll(pll_value[best].vx855_pll); value = vx855_encode_pll(get_pll_config(vx855_pll_config,
ARRAY_SIZE(vx855_pll_config), clk));
break; break;
} }
......
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