提交 e3ab8e42 编写于 作者: A Aaron Lu 提交者: Rafael J. Wysocki

ACPICA: Resource manager: Add support for ACPI 5 wake bit in IRQ descriptor.

Add support to both get and set the extended share flags for the
IRQ() resource descriptor. Reported by Aaron Lu.
Signed-off-by: NAaron Lu <aaron.lu@intel.com>
Signed-off-by: NBob Moore <robert.moore@intel.com>
Signed-off-by: NLv Zheng <lv.zheng@intel.com>
Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
上级 78d025e2
......@@ -80,7 +80,7 @@ struct acpi_rsconvert_info acpi_rs_get_irq[8] = {
{ACPI_RSC_EXIT_NE, ACPI_RSC_COMPARE_AML_LENGTH, 0, 3},
/* Get flags: Triggering[0], Polarity[3], Sharing[4] */
/* Get flags: Triggering[0], Polarity[3], sharing_and_wake[4:5] */
{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.triggering),
AML_OFFSET(irq.flags),
......@@ -90,7 +90,7 @@ struct acpi_rsconvert_info acpi_rs_get_irq[8] = {
AML_OFFSET(irq.flags),
3},
{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.sharable),
{ACPI_RSC_2BITFLAG, ACPI_RS_OFFSET(data.irq.sharable),
AML_OFFSET(irq.flags),
4}
};
......@@ -114,7 +114,7 @@ struct acpi_rsconvert_info acpi_rs_set_irq[13] = {
AML_OFFSET(irq.irq_mask),
ACPI_RS_OFFSET(data.irq.interrupt_count)},
/* Set the flags byte */
/* Set flags: Triggering[0], Polarity[3], sharing_and_wake[4:5] */
{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.triggering),
AML_OFFSET(irq.flags),
......@@ -124,7 +124,7 @@ struct acpi_rsconvert_info acpi_rs_set_irq[13] = {
AML_OFFSET(irq.flags),
3},
{ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET(data.irq.sharable),
{ACPI_RSC_2BITFLAG, ACPI_RS_OFFSET(data.irq.sharable),
AML_OFFSET(irq.flags),
4},
......
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