提交 df08ac01 编写于 作者: P Pali Rohár 提交者: Lorenzo Pieralisi

PCI: mvebu: Setup PCIe controller to Root Complex mode

This driver operates only in Root Complex mode, so ensure that hardware is
properly configured in Root Complex mode.

Link: https://lore.kernel.org/r/20211125124605.25915-10-pali@kernel.orgSigned-off-by: NPali Rohár <pali@kernel.org>
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
上级 e7a01876
...@@ -55,6 +55,7 @@ ...@@ -55,6 +55,7 @@
#define PCIE_MASK_ENABLE_INTS 0x0f000000 #define PCIE_MASK_ENABLE_INTS 0x0f000000
#define PCIE_CTRL_OFF 0x1a00 #define PCIE_CTRL_OFF 0x1a00
#define PCIE_CTRL_X1_MODE 0x0001 #define PCIE_CTRL_X1_MODE 0x0001
#define PCIE_CTRL_RC_MODE BIT(1)
#define PCIE_STAT_OFF 0x1a04 #define PCIE_STAT_OFF 0x1a04
#define PCIE_STAT_BUS 0xff00 #define PCIE_STAT_BUS 0xff00
#define PCIE_STAT_DEV 0x1f0000 #define PCIE_STAT_DEV 0x1f0000
...@@ -213,7 +214,12 @@ static void mvebu_pcie_setup_wins(struct mvebu_pcie_port *port) ...@@ -213,7 +214,12 @@ static void mvebu_pcie_setup_wins(struct mvebu_pcie_port *port)
static void mvebu_pcie_setup_hw(struct mvebu_pcie_port *port) static void mvebu_pcie_setup_hw(struct mvebu_pcie_port *port)
{ {
u32 cmd, mask; u32 ctrl, cmd, mask;
/* Setup PCIe controller to Root Complex mode. */
ctrl = mvebu_readl(port, PCIE_CTRL_OFF);
ctrl |= PCIE_CTRL_RC_MODE;
mvebu_writel(port, ctrl, PCIE_CTRL_OFF);
/* Disable Root Bridge I/O space, memory space and bus mastering. */ /* Disable Root Bridge I/O space, memory space and bus mastering. */
cmd = mvebu_readl(port, PCIE_CMD_OFF); cmd = mvebu_readl(port, PCIE_CMD_OFF);
......
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