提交 dd39c358 编写于 作者: M Marc Kleine-Budde 提交者: Felipe Balbi

USB: ci13xxx_udc: handle controllers with less than 16 EPs

The ci13xxx_udc driver checks the number of endpoints in the udc
controller, however some routines expect that the hardware has 16
bidirectional endpoints.

This patch improves the driver to work on controllers with less than
16 endpoints like the udc controller found on freescale's
mx23 and mx28.
Tested-by: NPavankumar Kondeti <pkondeti@codeaurora.org>
Signed-off-by: NMarc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: NFelipe Balbi <balbi@ti.com>
上级 7bb4fdc6
......@@ -182,6 +182,16 @@ static inline int hw_ep_bit(int num, int dir)
return num + (dir ? 16 : 0);
}
static int ep_to_bit(int n)
{
int fill = 16 - hw_ep_max / 2;
if (n >= hw_ep_max / 2)
n += fill;
return n;
}
/**
* hw_aread: reads from register bitfield
* @addr: address relative to bus map
......@@ -440,12 +450,13 @@ static int hw_ep_get_halt(int num, int dir)
/**
* hw_test_and_clear_setup_status: test & clear setup status (execute without
* interruption)
* @n: bit number (endpoint)
* @n: endpoint number
*
* This function returns setup status
*/
static int hw_test_and_clear_setup_status(int n)
{
n = ep_to_bit(n);
return hw_ctest_and_clear(CAP_ENDPTSETUPSTAT, BIT(n));
}
......@@ -641,12 +652,13 @@ static int hw_register_write(u16 addr, u32 data)
/**
* hw_test_and_clear_complete: test & clear complete status (execute without
* interruption)
* @n: bit number (endpoint)
* @n: endpoint number
*
* This function returns complete status
*/
static int hw_test_and_clear_complete(int n)
{
n = ep_to_bit(n);
return hw_ctest_and_clear(CAP_ENDPTCOMPLETE, BIT(n));
}
......
......@@ -127,7 +127,7 @@ struct ci13xxx {
struct ci13xxx_ep ci13xxx_ep[ENDPT_MAX]; /* extended endpts */
u32 ep0_dir; /* ep0 direction */
#define ep0out ci13xxx_ep[0]
#define ep0in ci13xxx_ep[16]
#define ep0in ci13xxx_ep[hw_ep_max / 2]
u8 remote_wakeup; /* Is remote wakeup feature
enabled by the host? */
u8 suspended; /* suspended by the host */
......
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