提交 da67e68c 编写于 作者: E Eric Engestrom 提交者: Vineet Gupta

Documentation: dt: arc: fix spelling mistakes

Signed-off-by: NEric Engestrom <eric@engestrom.ch>
Signed-off-by: NVineet Gupta <vgupta@synopsys.com>
上级 d9676fa1
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The ARC HS can be configured with a pipeline performance monitor for counting The ARC HS can be configured with a pipeline performance monitor for counting
CPU and cache events like cache misses and hits. Like conventional PCT there CPU and cache events like cache misses and hits. Like conventional PCT there
are 100+ hardware conditions dynamically mapped to upto 32 counters. are 100+ hardware conditions dynamically mapped to up to 32 counters.
It also supports overflow interrupts. It also supports overflow interrupts.
Required properties: Required properties:
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The ARC700 can be configured with a pipeline performance monitor for counting The ARC700 can be configured with a pipeline performance monitor for counting
CPU and cache events like cache misses and hits. Like conventional PCT there CPU and cache events like cache misses and hits. Like conventional PCT there
are 100+ hardware conditions dynamically mapped to upto 32 counters are 100+ hardware conditions dynamically mapped to up to 32 counters
Note that: Note that:
* The ARC 700 PCT does not support interrupts; although HW events may be * The ARC 700 PCT does not support interrupts; although HW events may be
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