Skip to content
体验新版
项目
组织
正在加载...
登录
切换导航
打开侧边栏
openeuler
Kernel
提交
d92c9d5b
K
Kernel
项目概览
openeuler
/
Kernel
大约 1 年 前同步成功
通知
7
Star
0
Fork
0
代码
文件
提交
分支
Tags
贡献者
分支图
Diff
Issue
0
列表
看板
标记
里程碑
合并请求
0
DevOps
流水线
流水线任务
计划
Wiki
0
Wiki
分析
仓库
DevOps
项目成员
Pages
K
Kernel
项目概览
项目概览
详情
发布
仓库
仓库
文件
提交
分支
标签
贡献者
分支图
比较
Issue
0
Issue
0
列表
看板
标记
里程碑
合并请求
0
合并请求
0
Pages
DevOps
DevOps
流水线
流水线任务
计划
分析
分析
仓库分析
DevOps
Wiki
0
Wiki
成员
成员
收起侧边栏
关闭侧边栏
动态
分支图
创建新Issue
流水线任务
提交
Issue看板
提交
d92c9d5b
编写于
11月 23, 2011
作者:
A
Arnd Bergmann
浏览文件
操作
浏览文件
下载
差异文件
Merge branch 'imx-for-arnd' of
git://git.pengutronix.de/git/imx/linux-2.6
into fixes
上级
4f778f56
7378a62b
变更
9
隐藏空白更改
内联
并排
Showing
9 changed file
with
69 addition
and
90 deletion
+69
-90
MAINTAINERS
MAINTAINERS
+1
-0
arch/arm/mach-imx/Kconfig
arch/arm/mach-imx/Kconfig
+0
-13
arch/arm/mach-imx/mm-imx3.c
arch/arm/mach-imx/mm-imx3.c
+58
-51
arch/arm/mach-mx5/cpu.c
arch/arm/mach-mx5/cpu.c
+3
-2
arch/arm/mach-mx5/mm.c
arch/arm/mach-mx5/mm.c
+4
-2
arch/arm/plat-mxc/include/mach/common.h
arch/arm/plat-mxc/include/mach/common.h
+0
-1
arch/arm/plat-mxc/include/mach/mxc.h
arch/arm/plat-mxc/include/mach/mxc.h
+0
-14
arch/arm/plat-mxc/include/mach/system.h
arch/arm/plat-mxc/include/mach/system.h
+1
-6
arch/arm/plat-mxc/system.c
arch/arm/plat-mxc/system.c
+2
-1
未找到文件。
MAINTAINERS
浏览文件 @
d92c9d5b
...
...
@@ -789,6 +789,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
T: git git://git.pengutronix.de/git/imx/linux-2.6.git
F: arch/arm/mach-mx*/
F: arch/arm/mach-imx/
F: arch/arm/plat-mxc/
ARM/FREESCALE IMX51
...
...
arch/arm/mach-imx/Kconfig
浏览文件 @
d92c9d5b
...
...
@@ -10,11 +10,6 @@ config HAVE_IMX_MMDC
config HAVE_IMX_SRC
bool
#
# ARCH_MX31 and ARCH_MX35 are left for compatibility
# Some usages assume that having one of them implies not having (e.g.) ARCH_MX2.
# To easily distinguish good and reviewed from unreviewed usages new (and IMHO
# more sensible) names are used: SOC_IMX31 and SOC_IMX35
config ARCH_MX1
bool
...
...
@@ -27,12 +22,6 @@ config ARCH_MX25
config MACH_MX27
bool
config ARCH_MX31
bool
config ARCH_MX35
bool
config SOC_IMX1
bool
select ARCH_MX1
...
...
@@ -72,7 +61,6 @@ config SOC_IMX31
select CPU_V6
select IMX_HAVE_PLATFORM_MXC_RNGA
select ARCH_MXC_AUDMUX_V2
select ARCH_MX31
select MXC_AVIC
select SMP_ON_UP if SMP
...
...
@@ -82,7 +70,6 @@ config SOC_IMX35
select ARCH_MXC_IOMUX_V3
select ARCH_MXC_AUDMUX_V2
select HAVE_EPIT
select ARCH_MX35
select MXC_AVIC
select SMP_ON_UP if SMP
...
...
arch/arm/mach-imx/mm-imx3.c
浏览文件 @
d92c9d5b
...
...
@@ -33,29 +33,32 @@
static
void
imx3_idle
(
void
)
{
unsigned
long
reg
=
0
;
__asm__
__volatile__
(
/* disable I and D cache */
"mrc p15, 0, %0, c1, c0, 0
\n
"
"bic %0, %0, #0x00001000
\n
"
"bic %0, %0, #0x00000004
\n
"
"mcr p15, 0, %0, c1, c0, 0
\n
"
/* invalidate I cache */
"mov %0, #0
\n
"
"mcr p15, 0, %0, c7, c5, 0
\n
"
/* clear and invalidate D cache */
"mov %0, #0
\n
"
"mcr p15, 0, %0, c7, c14, 0
\n
"
/* WFI */
"mov %0, #0
\n
"
"mcr p15, 0, %0, c7, c0, 4
\n
"
"nop
\n
"
"nop
\n
"
"nop
\n
"
"nop
\n
"
"nop
\n
"
"nop
\n
"
"nop
\n
"
/* enable I and D cache */
"mrc p15, 0, %0, c1, c0, 0
\n
"
"orr %0, %0, #0x00001000
\n
"
"orr %0, %0, #0x00000004
\n
"
"mcr p15, 0, %0, c1, c0, 0
\n
"
:
"=r"
(
reg
));
if
(
!
need_resched
())
__asm__
__volatile__
(
/* disable I and D cache */
"mrc p15, 0, %0, c1, c0, 0
\n
"
"bic %0, %0, #0x00001000
\n
"
"bic %0, %0, #0x00000004
\n
"
"mcr p15, 0, %0, c1, c0, 0
\n
"
/* invalidate I cache */
"mov %0, #0
\n
"
"mcr p15, 0, %0, c7, c5, 0
\n
"
/* clear and invalidate D cache */
"mov %0, #0
\n
"
"mcr p15, 0, %0, c7, c14, 0
\n
"
/* WFI */
"mov %0, #0
\n
"
"mcr p15, 0, %0, c7, c0, 4
\n
"
"nop
\n
"
"nop
\n
"
"nop
\n
"
"nop
\n
"
"nop
\n
"
"nop
\n
"
"nop
\n
"
/* enable I and D cache */
"mrc p15, 0, %0, c1, c0, 0
\n
"
"orr %0, %0, #0x00001000
\n
"
"orr %0, %0, #0x00000004
\n
"
"mcr p15, 0, %0, c1, c0, 0
\n
"
:
"=r"
(
reg
));
local_irq_enable
();
}
static
void
__iomem
*
imx3_ioremap
(
unsigned
long
phys_addr
,
size_t
size
,
...
...
@@ -108,6 +111,7 @@ void imx3_init_l2x0(void)
l2x0_init
(
l2x0_base
,
0x00030024
,
0x00000000
);
}
#ifdef CONFIG_SOC_IMX31
static
struct
map_desc
mx31_io_desc
[]
__initdata
=
{
imx_map_entry
(
MX31
,
X_MEMC
,
MT_DEVICE
),
imx_map_entry
(
MX31
,
AVIC
,
MT_DEVICE_NONSHARED
),
...
...
@@ -126,33 +130,11 @@ void __init mx31_map_io(void)
iotable_init
(
mx31_io_desc
,
ARRAY_SIZE
(
mx31_io_desc
));
}
static
struct
map_desc
mx35_io_desc
[]
__initdata
=
{
imx_map_entry
(
MX35
,
X_MEMC
,
MT_DEVICE
),
imx_map_entry
(
MX35
,
AVIC
,
MT_DEVICE_NONSHARED
),
imx_map_entry
(
MX35
,
AIPS1
,
MT_DEVICE_NONSHARED
),
imx_map_entry
(
MX35
,
AIPS2
,
MT_DEVICE_NONSHARED
),
imx_map_entry
(
MX35
,
SPBA0
,
MT_DEVICE_NONSHARED
),
};
void
__init
mx35_map_io
(
void
)
{
iotable_init
(
mx35_io_desc
,
ARRAY_SIZE
(
mx35_io_desc
));
}
void
__init
imx31_init_early
(
void
)
{
mxc_set_cpu_type
(
MXC_CPU_MX31
);
mxc_arch_reset_init
(
MX31_IO_ADDRESS
(
MX31_WDOG_BASE_ADDR
));
imx_idle
=
imx3_idle
;
imx_ioremap
=
imx3_ioremap
;
}
void
__init
imx35_init_early
(
void
)
{
mxc_set_cpu_type
(
MXC_CPU_MX35
);
mxc_iomux_v3_init
(
MX35_IO_ADDRESS
(
MX35_IOMUXC_BASE_ADDR
));
mxc_arch_reset_init
(
MX35_IO_ADDRESS
(
MX35_WDOG_BASE_ADDR
));
imx_idle
=
imx3_idle
;
pm_idle
=
imx3_idle
;
imx_ioremap
=
imx3_ioremap
;
}
...
...
@@ -161,11 +143,6 @@ void __init mx31_init_irq(void)
mxc_init_irq
(
MX31_IO_ADDRESS
(
MX31_AVIC_BASE_ADDR
));
}
void
__init
mx35_init_irq
(
void
)
{
mxc_init_irq
(
MX35_IO_ADDRESS
(
MX35_AVIC_BASE_ADDR
));
}
static
struct
sdma_script_start_addrs
imx31_to1_sdma_script
__initdata
=
{
.
per_2_per_addr
=
1677
,
};
...
...
@@ -199,6 +176,35 @@ void __init imx31_soc_init(void)
imx_add_imx_sdma
(
"imx31-sdma"
,
MX31_SDMA_BASE_ADDR
,
MX31_INT_SDMA
,
&
imx31_sdma_pdata
);
}
#endif
/* ifdef CONFIG_SOC_IMX31 */
#ifdef CONFIG_SOC_IMX35
static
struct
map_desc
mx35_io_desc
[]
__initdata
=
{
imx_map_entry
(
MX35
,
X_MEMC
,
MT_DEVICE
),
imx_map_entry
(
MX35
,
AVIC
,
MT_DEVICE_NONSHARED
),
imx_map_entry
(
MX35
,
AIPS1
,
MT_DEVICE_NONSHARED
),
imx_map_entry
(
MX35
,
AIPS2
,
MT_DEVICE_NONSHARED
),
imx_map_entry
(
MX35
,
SPBA0
,
MT_DEVICE_NONSHARED
),
};
void
__init
mx35_map_io
(
void
)
{
iotable_init
(
mx35_io_desc
,
ARRAY_SIZE
(
mx35_io_desc
));
}
void
__init
imx35_init_early
(
void
)
{
mxc_set_cpu_type
(
MXC_CPU_MX35
);
mxc_iomux_v3_init
(
MX35_IO_ADDRESS
(
MX35_IOMUXC_BASE_ADDR
));
mxc_arch_reset_init
(
MX35_IO_ADDRESS
(
MX35_WDOG_BASE_ADDR
));
pm_idle
=
imx3_idle
;
imx_ioremap
=
imx3_ioremap
;
}
void
__init
mx35_init_irq
(
void
)
{
mxc_init_irq
(
MX35_IO_ADDRESS
(
MX35_AVIC_BASE_ADDR
));
}
static
struct
sdma_script_start_addrs
imx35_to1_sdma_script
__initdata
=
{
.
ap_2_ap_addr
=
642
,
...
...
@@ -254,3 +260,4 @@ void __init imx35_soc_init(void)
imx_add_imx_sdma
(
"imx35-sdma"
,
MX35_SDMA_BASE_ADDR
,
MX35_INT_SDMA
,
&
imx35_sdma_pdata
);
}
#endif
/* ifdef CONFIG_SOC_IMX35 */
arch/arm/mach-mx5/cpu.c
浏览文件 @
d92c9d5b
...
...
@@ -16,7 +16,7 @@
#include <linux/init.h>
#include <linux/module.h>
#include <mach/hardware.h>
#include <
asm
/io.h>
#include <
linux
/io.h>
static
int
mx5_cpu_rev
=
-
1
;
...
...
@@ -67,7 +67,8 @@ static int __init mx51_neon_fixup(void)
if
(
!
cpu_is_mx51
())
return
0
;
if
(
mx51_revision
()
<
IMX_CHIP_REVISION_3_0
&&
(
elf_hwcap
&
HWCAP_NEON
))
{
if
(
mx51_revision
()
<
IMX_CHIP_REVISION_3_0
&&
(
elf_hwcap
&
HWCAP_NEON
))
{
elf_hwcap
&=
~
HWCAP_NEON
;
pr_info
(
"Turning off NEON support, detected broken NEON implementation
\n
"
);
}
...
...
arch/arm/mach-mx5/mm.c
浏览文件 @
d92c9d5b
...
...
@@ -23,7 +23,9 @@
static
void
imx5_idle
(
void
)
{
mx5_cpu_lp_set
(
WAIT_UNCLOCKED_POWER_OFF
);
if
(
!
need_resched
())
mx5_cpu_lp_set
(
WAIT_UNCLOCKED_POWER_OFF
);
local_irq_enable
();
}
/*
...
...
@@ -89,7 +91,7 @@ void __init imx51_init_early(void)
mxc_set_cpu_type
(
MXC_CPU_MX51
);
mxc_iomux_v3_init
(
MX51_IO_ADDRESS
(
MX51_IOMUXC_BASE_ADDR
));
mxc_arch_reset_init
(
MX51_IO_ADDRESS
(
MX51_WDOG1_BASE_ADDR
));
imx
_idle
=
imx5_idle
;
pm
_idle
=
imx5_idle
;
}
void
__init
imx53_init_early
(
void
)
...
...
arch/arm/plat-mxc/include/mach/common.h
浏览文件 @
d92c9d5b
...
...
@@ -85,7 +85,6 @@ enum mxc_cpu_pwr_mode {
};
extern
void
mx5_cpu_lp_set
(
enum
mxc_cpu_pwr_mode
mode
);
extern
void
(
*
imx_idle
)(
void
);
extern
void
imx_print_silicon_rev
(
const
char
*
cpu
,
int
srev
);
void
avic_handle_irq
(
struct
pt_regs
*
);
...
...
arch/arm/plat-mxc/include/mach/mxc.h
浏览文件 @
d92c9d5b
...
...
@@ -50,20 +50,6 @@
#define IMX_CHIP_REVISION_3_3 0x33
#define IMX_CHIP_REVISION_UNKNOWN 0xff
#define IMX_CHIP_REVISION_1_0_STRING "1.0"
#define IMX_CHIP_REVISION_1_1_STRING "1.1"
#define IMX_CHIP_REVISION_1_2_STRING "1.2"
#define IMX_CHIP_REVISION_1_3_STRING "1.3"
#define IMX_CHIP_REVISION_2_0_STRING "2.0"
#define IMX_CHIP_REVISION_2_1_STRING "2.1"
#define IMX_CHIP_REVISION_2_2_STRING "2.2"
#define IMX_CHIP_REVISION_2_3_STRING "2.3"
#define IMX_CHIP_REVISION_3_0_STRING "3.0"
#define IMX_CHIP_REVISION_3_1_STRING "3.1"
#define IMX_CHIP_REVISION_3_2_STRING "3.2"
#define IMX_CHIP_REVISION_3_3_STRING "3.3"
#define IMX_CHIP_REVISION_UNKNOWN_STRING "unknown"
#ifndef __ASSEMBLY__
extern
unsigned
int
__mxc_cpu_type
;
#endif
...
...
arch/arm/plat-mxc/include/mach/system.h
浏览文件 @
d92c9d5b
...
...
@@ -17,14 +17,9 @@
#ifndef __ASM_ARCH_MXC_SYSTEM_H__
#define __ASM_ARCH_MXC_SYSTEM_H__
extern
void
(
*
imx_idle
)(
void
);
static
inline
void
arch_idle
(
void
)
{
if
(
imx_idle
!=
NULL
)
(
imx_idle
)();
else
cpu_do_idle
();
cpu_do_idle
();
}
void
arch_reset
(
char
mode
,
const
char
*
cmd
);
...
...
arch/arm/plat-mxc/system.c
浏览文件 @
d92c9d5b
...
...
@@ -21,6 +21,7 @@
#include <linux/io.h>
#include <linux/err.h>
#include <linux/delay.h>
#include <linux/module.h>
#include <mach/hardware.h>
#include <mach/common.h>
...
...
@@ -28,8 +29,8 @@
#include <asm/system.h>
#include <asm/mach-types.h>
void
(
*
imx_idle
)(
void
)
=
NULL
;
void
__iomem
*
(
*
imx_ioremap
)(
unsigned
long
,
size_t
,
unsigned
int
)
=
NULL
;
EXPORT_SYMBOL_GPL
(
imx_ioremap
);
static
void
__iomem
*
wdog_base
;
...
...
编辑
预览
Markdown
is supported
0%
请重试
或
添加新附件
.
添加附件
取消
You are about to add
0
people
to the discussion. Proceed with caution.
先完成此消息的编辑!
取消
想要评论请
注册
或
登录